IP Library Granted Patent US 8,299,596
Granted Patent B2
US 8,299,596 · App. 12/968,257 · Granted Oct 30, 2012

Integrated circuit packaging system with bump conductors and method of manufacture thereof

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Quick Facts
Patent No.
US 8,299,596
App. No.
12/968,257
Granted
Oct 30, 2012
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a component side; mounting a base device having a base circuit connector directly on the component side; attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device; and attaching a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side.

Claims (32)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a base substrate having a component side;

mounting a base device having a base circuit connector directly on the component side;

attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device; and

attaching a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side including forming an electrical connection between the stack interconnects and the conformal interconnects by thermal compression having a temperature below reflow.

2. The method as claimed in claim 1 wherein providing the base substrate includes providing the base substrate having the component side with a convex shaped surface.

3. The method as claimed in claim 1 further comprising attaching a system interconnect to a base side of the base substrate opposite the component side.

4. The method as claimed in claim 1 further comprising connecting a stack device to a side of the stack substrate opposite the stack side.

5. The method as claimed in claim 1 wherein attaching the stack interconnects directly on the conformal interconnects includes abutting a surface of the stack interconnects to the component side.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a base substrate having a component side;

mounting a base device having a base circuit connector directly on the component side;

attaching conformal interconnects, having the same pre-deformation height from the component side, directly on the component side and offset from the base device; and

attaching a stack substrate having a stack side with stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side including forming an electrical connection between the stack interconnects and the conformal interconnects by thermal compression having a temperature below reflow.

7. The method as claimed in claim 6 wherein attaching the stack substrate includes attaching the stack substrate having the stack side with a convex shaped surface.

8. The method as claimed in claim 6 further comprising attaching a system interconnect to a concave shaped surface of the base substrate opposite the component side.

9. The method as claimed in claim 6 further comprising connecting a stack device to a concave shaped surface of the stack substrate opposite the stack side.

10. The method as claimed in claim 6 wherein attaching the stack interconnects directly on the conformal interconnects includes abutting a contact surface area of the stack interconnects to the component side.

11. An integrated circuit packaging system comprising:

a base substrate having a component side;

a base device having a base circuit connector mounted directly on the component side;

conformal interconnects attached directly on the component side and offset from the base device; and

a stack substrate having stack interconnects directly on the conformal interconnects, portions of the stack interconnects covered by the conformal interconnects having different deformation heights from the component side, with an electrical connection between the stack interconnects and the conformal interconnects formed by thermal compression having a temperature below reflow.

12. The system as claimed in claim 11 wherein the base substrate includes the base substrate having the component side with a convex shaped surface.

13. The system as claimed in claim 11 further comprising a system interconnect attached to a base side of the base substrate opposite the component side.

14. The system as claimed in claim 11 further comprising a stack device connected to a side of the stack substrate opposite the stack side.

15. The system as claimed in claim 11 wherein the stack interconnects includes a surface of the stack interconnects abutted to the component side.

16. The system as claimed in claim 11 wherein the stack substrate includes a stack side with the stack interconnects.

17. The system as claimed in claim 16 wherein the stack substrate includes the stack substrate having the stack side with a convex shaped surface.

18. The system as claimed in claim 16 further comprising a system interconnect attached to a concave shaped surface of the base substrate opposite the component side.

19. The system as claimed in claim 16 further comprising a stack device connected to a concave shaped surface of the stack substrate opposite the stack side.

20. The system as claimed in claim 16 wherein the stack interconnects includes a contact surface area of the stack interconnects abutted to the component side.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0252. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0784 →
RELEASE OF SECURITY INTEREST Recorded Jun 8, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052864/0057 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0252 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2011
From: HUANG, RUI; CHOW, SENG GUAN; KUAN, HEAP HOE
To: STATS CHIPPAC LTD.
Reel/Frame 025680/0336 →