IP Library Granted Patent US 8,377,750
Granted Patent B2
US 8,377,750 · App. 12/968,266 · Granted Feb 19, 2013

Integrated circuit packaging system with multiple row leads and method of manufacture thereof

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Quick Facts
Patent No.
US 8,377,750
App. No.
12/968,266
Granted
Feb 19, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a base structure having a die paddle, an outer lead, and an inner lead between the die paddle and the outer lead, with a pre-plated finish on a base structure system side of the base structure; mounting an integrated circuit device to a side of the die paddle opposite the paddle system side; attaching an interconnect to the integrated circuit device and a side of the inner lead opposite the inner lead system side; applying an encapsulation around the integrated circuit device, the interconnect, and the base structure with the pre-plated finish exposed from the encapsulation; and forming an inward channel in the encapsulation to electrically isolate the inner lead.

Claims (32)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a base structure having a die paddle, an outer lead, and an inner lead between the die paddle and the outer lead, with a pre-plated finish on a base structure system side of the base structure;

mounting an integrated circuit device to a side of the die paddle opposite the paddle system side;

attaching an interconnect to the integrated circuit device and a side of the inner lead opposite the inner lead system side;

applying an encapsulation around the integrated circuit device, the interconnect, and the base structure with a flat non-horizontal side of the outer lead and the pre-plated finish exposed from the encapsulation; and

forming an inward channel in the encapsulation to electrically isolate the inner lead.

2. The method as claimed in claim 1 further comprising forming an outward channel in the encapsulation on a side of the inner lead opposite the inward channel.

3. The method as claimed in claim 1 wherein forming the inner lead of the base structure includes forming the inner lead having a platform extension.

4. The method as claimed in claim 1 further comprising forming an outward channel in the encapsulation, the outward channel having an outward channel width less than an inward channel width of the inward channel.

5. A method of manufacture of an integrated circuit packaging system comprising:

forming a base structure having a die paddle, an outer lead, and an inner lead between the die paddle and the outer lead, with a pre-plated finish on a base structure system side of the base structure;

mounting an integrated circuit device to a side of the die paddle opposite the paddle system side;

attaching an interconnect to the integrated circuit device and a side of the inner lead opposite the inner lead system side;

applying an encapsulation around the integrated circuit device, the interconnect, and the base structure with a flat non-horizontal side of the outer lead and the pre-plated finish exposed from the encapsulation; and

forming an inward channel in the encapsulation to electrically isolate the inner lead exposing the paddle system side and the inner lead system side at ends of the inward channel.

6. The method as claimed in claim 5 further comprising forming an outward channel in the encapsulation on a side of the inner lead opposite the inward channel to electrically isolate the inner lead.

7. The method as claimed in claim 5 wherein forming the inner lead of the base structure includes forming the inner lead having a platform extension exposed from an encapsulation side of the encapsulation.

8. The method as claimed in claim 5 further comprising forming an outward channel in the encapsulation, the outward channel having an outward channel width greater than an inward channel width of the inward channel.

9. An integrated circuit packaging system comprising:

a base structure having a die paddle, an outer lead, and an inner lead between the die paddle and the outer lead with a pre-plated finish on a base structure system side of the base structure;

an integrated circuit device mounted to a side of the die paddle opposite the paddle system side;

an interconnect attached to the integrated circuit device and a side of the inner lead opposite the inner lead system side;

an encapsulation around the integrated circuit device, the interconnect, and the base structure, with a flat non-horizontal side of the outer lead and the pre-plated finish exposed from the encapsulation; and

an inward channel in the encapsulation to electrically isolate the inner lead.

10. The system as claimed in claim 9 further comprising an outward channel in the encapsulation on a side of the inner lead opposite the inward channel.

11. The system as claimed in claim 9 wherein the inner lead includes a platform extension.

12. The system as claimed in claim 9 further comprising an outward channel in the encapsulation, the outward channel having an outward channel width less than an inward channel width of the inward channel.

13. The system as claimed in claim 9 wherein an inward channel in the encapsulation includes the paddle system side and the inner lead system side exposed at ends of the inward channel.

14. The system as claimed in claim 13 further comprising forming an outward channel in the encapsulation on a side of the inner lead opposite the inward channel to electrically isolate the inner lead.

15. The system as claimed in claim 13 wherein the inner lead includes a platform extension exposed from an encapsulation side of the encapsulation.

16. The system as claimed in claim 13 further comprising an outward channel in the encapsulation, the outward channel having an outward channel width greater than an inward channel width of the inward channel.

17. The system as claimed in claim 13 wherein the encapsulation over the base structure includes a flat non-horizontal side of the outer lead exposed from an encapsulation side of the encapsulation.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON THE COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0244. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065239/0786 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0244 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2011
From: CAMACHO, ZIGMUND RAMIREZ; MERILO, DIOSCORO A.; BATHAN, HENRY DESCALZO
To: STATS CHIPPAC LTD.
Reel/Frame 025680/0415 →