IP Library Granted Patent US 8,531,197
Granted Patent B2
US 8,531,197 · App. 13/054,122 · Granted Sep 10, 2013

Integrated circuit die, an integrated circuit package and a method for connecting an integrated circuit die to an external device

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Quick Facts
Patent No.
US 8,531,197
App. No.
13/054,122
Granted
Sep 10, 2013
Kind
B2
Abstract

An integrated circuit die comprises an electronic circuit and one or more output ports for outputting signals from the die via an external impedance, to a load, external from the die. The output port is connected to the electronic circuit. The die is further provided with an on-die sampling oscilloscope circuit connected to the output port, for measuring a waveform of the outputted signals.

Claims (31)

1. An integrated circuit die comprising:

an electronic circuit;

at least one output port for outputting signals from the die to an external component, external from the die, said output port being connected to the electronic circuit;

said die further being provided with an on-die sampling oscilloscope circuit connected to said output port, for measuring a waveform of said outputted signals.

2. An integrated circuit die as claimed in claim 1 , wherein output port includes:

an output driver connected to said electronic circuit, for generating a high signal or a low signal in response to a logic signal received from the electronic circuit; and

an output contact connected to said output driver, and connectable to said external component, for transferring said high signal or low signal to said external device.

3. An integrated circuit die as claimed in claim 2 , wherein said on-die sampling oscilloscope circuit is connected to a node between said output driver and said output contact.

4. An integrated circuit die as claimed in claim 1 , wherein said on-die sampling oscilloscope circuit includes:

a comparator connected with a first comparator input to said output port via attenuator and with a second comparator input to a source of a reference signal with a reference signal level which changes over time, said comparator having a comparator output at which a high logical signal is outputted when said outputted signal has a signal level corresponding to said reference signal level and at which a low logical signal is outputted when said outputted signal has a signal level not corresponding to said reference signal level.

5. An integrated circuit die as claimed in claim 1 , wherein said source provides a reference signal level which changes stepwise, and wherein a step of said reference signal level has a duration of at least a period of the outputted signals.

6. An integrated circuit die as claimed in claim 4 , comprising a unit for determining a point in time said outputted signal has a signal level corresponding to said reference signal level.

7. An integrated circuit die as claimed in claim 1 , wherein said on-die sampling oscilloscope circuit 4 has a maximum measuring level which exceeds a power supply level of the on-die sampling oscilloscope circuit and an output driver and/or a minimum measuring level which is below a ground of the on-die sampling oscilloscope circuit and the output driver.

8. An integrated circuit die as claimed in claim 1 , wherein said die is further provided with a test unit for performing one or more test functions, said test function comprising comparing said measured waveform with at least one test criterion.

9. An integrated circuit die as claimed in claim 8 , wherein said test unit includes logic for extracting at least one parameter related to the die or an environment of the die from said measured waveform.

10. An integrated circuit die as claimed in claim 9 , wherein said parameter includes one or more of the group consisting of: driver output impedance, signal level of said outputted signal, impedance of an external load connected to said output port, length of an external transmission line connected to said output port, load of said external transmission line.

11. An integrated circuit die as claimed in claim 1 , comprising a board on which said die is mounted, said board comprising at least one signal path connected to said output port, for propagating said outputted signal to said external device.

12. An integrated circuit die as claimed in claim 1 , wherein said on-die sampling oscilloscope circuit is connected to a plurality of output ports.

13. An integrated circuit package, comprising:

an integrated circuit die as claimed in claim 1 and

a package in which said integrated circuit die is packaged

at least one pin connecting the output port to outside the package.

14. A method of connecting an integrated circuit die to an external device, said integrated circuit die including an electronic circuit, and at least one output port for outputting signals from the die to an external component, external from the die, said output port being connected to the electronic circuit, said die further being provided with an on-die sampling oscilloscope circuit connected to said output port, for measuring a waveform of said outputted signals, said method comprising:

measuring a waveform of signals outputted at said output port using said on-die sampling oscilloscope circuit.

15. An integrated circuit die as claimed in claim 2 , wherein said on-die sampling oscilloscope circuit includes:

a comparator connected with a first comparator input to said output port via attenuator and with a second comparator input to a source of a reference signal with a reference signal level which changes over time, said comparator having a comparator output at which a high logical signal is outputted when said outputted signal has a signal level corresponding to said reference signal level and at which a low logical signal is outputted when said outputted signal has a signal level not corresponding to said reference signal level.

16. An integrated circuit die as claimed in claim 2 , wherein said source provides a reference signal level which changes stepwise, and wherein a step of said reference signal level has a duration of at least a period of the outputted signals.

17. An integrated circuit die as claimed in claim 2 , comprising a unit for determining a point in time said outputted signal has a signal level corresponding to said reference signal level.

18. An integrated circuit die as claimed in claim 3 , comprising a unit for determining a point in time said outputted signal has a signal level corresponding to said reference signal level.

19. An integrated circuit die as claimed in claim 2 , wherein said on-die sampling oscilloscope circuit 4 has a maximum measuring level which exceeds a power supply level of the on-die sampling oscilloscope circuit and an output driver and/or a minimum measuring level which is below a ground of the on-die sampling oscilloscope circuit and the output driver.

20. An integrated circuit die as claimed in claim 2 , wherein said die is further provided with a test unit for performing one or more test functions, said test function comprising comparing said measured waveform with at least one test criterion.

Assignments (32)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2018
From: NXP USA, INC.
To: VLSI TECHNOLOGY LLC
Reel/Frame 045084/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2011
From: FEFER, YEFIM-HAIM; NEIMAN, VALERY; SOFER, SERGEY
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 025639/0119 →