Storage system bus transfer optimization
View Patent ↗Embodiments of the invention include systems and methods for reducing bus transfers for a storage device. In particular, these systems and methods reduce bus transfers by modifying an interface transfer protocol which designates the size of a multiple block read or write command is transmitted in a separate block transfer size command. Separate block transfer size commands can be omitted where the storage device maintains a record of a previously used block transfer size and reuses the size for subsequent multiple block read or write commands.
1. A method for reducing bus overhead for a solid-state storage system, comprising:
receiving, by the solid-state storage system, a first command from a host system, the first command designating a read or write block count, the first command conforming to a communication protocol in which a read or write count is ordinarily used for only a single read or write command received immediately after the read or write block count;
receiving, by the solid-state storage system, a second command from the host system, the second command designating a multiple read or write command;
servicing the second command with a solid-state memory array of the storage system, the servicing of the second command comprising processing a number of blocks corresponding to the read or write block count of the first command;
receiving, by the solid-state storage system, a third command from the host system designating a multiple read or write command, wherein the third command is not immediately preceded by a command designating a read or write block count and not followed by a stop command; and
servicing the third command with the solid-state memory array, the servicing of the third command comprising reusing the read or write block count of the first command, whereby the reuse of the read or write block count of the first command reduces bus overhead for sequential same-sized read or write commands.
2. The method of claim 1 , wherein the reuse of the read of or write block count in servicing the third command does not conform to the communication protocol.
3. The method of claim 1 , wherein the protocol is a standardized multimedia card (MMC) protocol.
4. The method of claim 1 , wherein a non-continuous mode can be enabled and disabled by the host system, the non-continuous mode comprising reusing the read or write block count of the first command for servicing a subsequent command.
5. A non-volatile storage system for reducing bus wait times, comprising:
a non-volatile solid-state memory array;
an interface to a host system, the interface configured to receive commands according to a specification, wherein the specification specifies that multiple block transfer requests do not include a memory transfer count and that a memory transfer count is useable for a single command indicating a multiple block transfer request that is received immediately after receipt of a command indicating the memory transfer count; and
a controller configured to receive commands from the host system through the interface, the controller further configured to:
store, upon receipt of a first command including a memory transfer count, the memory transfer count;
transfer a first data set, upon receipt of a second command indicating a multiple block transfer request, according to the memory transfer count; and
transfer a second data set, upon receipt of a third command indicating a multiple block transfer received immediately subsequent to the second command, according to the memory transfer count, the transfer of the second data set comprising transferring a size of data equal to the memory transfer count, wherein the third command is not followed by a stop command;
wherein the re-use of the memory transfer count of the first command for the transfer of the second data set is not in compliance with the specification.
6. The non-volatile storage system of claim 5 , wherein the specification is the MMC specification.
7. The non-volatile storage system of claim 6 , wherein the first command is MMC command 23.
8. The non-volatile storage system of claim 7 , wherein the second and third commands are either MMC command 18 or MMC command 25.
9. The non-volatile storage system of claim 5 , wherein the second command is a read or write multiple block command.
10. The non-volatile storage system of claim 5 , the memory transfer count is stored in a non-destructive register.
11. A non-volatile storage system for reducing bus wait times, comprising:
a non-volatile solid-state memory array;
an interface to a host system, the interface configured to receive commands according to a specification, wherein the specification specifies a pairing of data transfer commands includes a data transfer size and a memory transfer request; and
a controller configured to receive commands from the host through the interface and execute the commands on the memory array, the controller further configured to:
store, in a memory, a data transfer size of a pairing of data transfer commands sent in accordance with the specification;
upon receipt of a subsequent memory transfer request not paired with an associated data transfer size as specified by the specification, and
retrieve the stored data transfer size and process the subsequent memory transfer request with the data transfer size,
wherein:
the subsequent memory transfer request is not paired with an associated data transfer size as specified by the specification,
the subsequent memory transfer request is not followed by a stop command, and
processing of the subsequent memory transfer request comprises transferring to the host system a size of data equal to the data transfer size.
12. The non-volatile storage system of claim 11 , wherein the specification is Multimedia Card (MMC) data transfer specification.
13. The non-volatile storage system of claim 11 , wherein the controller is further configured to retrieve by at least placing the stored data transfer size in a memory register and process the subsequent memory transfer request by at least iteratively reducing the value of the register to zero.
14. A non-volatile storage system, including:
a non-volatile solid-state memory array;
an interface to a host configured to receive commands according to a specification, wherein the specification specifies a continuous data transfer mode; and
a controller configured to receive commands from the host through the interface and execute the commands on the memory array, the controller further configured to:
operate either in the continuous data transfer mode specified by the specification and a non-continuous data transfer mode;
store, in a memory, a data transfer size designated by a data transfer size command sent by the host in accordance with the specification; and
upon receipt of a memory transfer command which is not immediately preceded by a command designating a data transfer size:
when the controller is operating in the continuous data transfer mode, transfer data to the host until a stop command is received from the host;
when the controller is operating in the non-continuous data transfer mode in which the memory transfer command is not followed by a stop command, transfer data to the host according to the stored data transfer size, the non-continuous mode deviating from the specification, wherein the transfer comprises transferring to the host a size of data equal to the stored transfer size.
15. The non-volatile storage system of claim 14 , wherein the controller is further configured to operate in the non-continuous mode upon receipt of a configuration command from the host.