IP Library Patent Application 13098419
Patent Application
App. No. 13/098,419

Semiconductor Device and Method of Forming 3D Inductor from Prefabricated Pillar Frame

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Quick Facts
Patent No.
US None
App. No.
13/098,419
Abstract

A semiconductor device is made by mounting a semiconductor component over a carrier. A ferromagnetic inductor core is formed over the carrier. A pillar frame including a plurality of bodies is mounted over the carrier, semiconductor component, and inductor core. An encapsulant is deposited around the semiconductor component, plurality of bodies, and inductor core. A portion of the pillar frame is removed. A first remaining portion of the pillar frame bodies provide inductor pillars around the inductor core and a second remaining portion of the pillar frame bodies provide an interconnect pillar. A first interconnect structure is formed over a first surface of the encapsulant. The carrier is removed. A second interconnect structure is formed over a second surface of the encapsulant. The first and second interconnect structures are electrically connected to the inductor pillars to form one or more 3D inductors.

Claims (56)

1 . A method of making a semiconductor device, comprising:

providing a carrier;

mounting a semiconductor component over the carrier;

forming an inductor core over the carrier;

mounting a pillar frame over the carrier and semiconductor component, the pillar frame including a plurality of bodies with a first portion of the bodies being disposed around the inductor core;

depositing an encapsulant around the semiconductor component, plurality of bodies, and inductor core;

removing a portion of the pillar frame while leaving the first portion of the bodies to form inductor pillars;

forming a first interconnect structure over a first surface of the encapsulant;

removing the carrier; and

forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form a 3D inductor.

2 . The method of claim 1 , wherein the inductor core includes ferromagnetic material.

3 . The method of claim 1 , wherein removing the portion of the pillar frame further leaves a second portion of the bodies to form an interconnect pillar.

4 . The method of claim 3 , further including stacking a plurality of the semiconductor components electrically connected through the interconnect pillar.

5 . The method of claim 3 , further including disposing a plurality of the semiconductor components side-by-side electrically connected through the interconnect pillar.

6 . The method of claim 1 , further including forming a shielding layer over the semiconductor component.

7 . The method of claim 1 , further including forming an integrated passive device within the first or second interconnect structures.

8 . A method of making a semiconductor device, comprising:

providing a carrier;

mounting a semiconductor component over the carrier;

mounting a pillar frame over the carrier and semiconductor component;

depositing an encapsulant over the semiconductor component and pillar frame;

removing a portion of the pillar frame, wherein a first remaining portion of the pillar frame provides inductor pillars;

forming a first interconnect structure over a first surface of the encapsulant;

removing the carrier; and

forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form a 3D inductor.

9 . The method of claim 8 , wherein a second remaining portion of the pillar frame provides an interconnect pillar.

10 . The method of claim 8 , wherein the first or second interconnect structure is electrically connected to a contact pad of the semiconductor component.

11 . The method of claim 8 , further including forming a shielding layer over the semiconductor component.

12 . The method of claim 8 , further including forming an integrated passive device within the first or second interconnect structures.

13 . The method of claim 8 , further including forming a discrete semiconductor component over the first interconnect structure.

14 . A method of making a semiconductor device, comprising:

providing a carrier;

mounting a semiconductor component over the carrier;

mounting a pillar frame over the carrier and semiconductor component;

depositing an encapsulant over the semiconductor component and pillar frame;

removing a portion of the pillar frame, wherein a first remaining portion of the pillar frame provides inductor pillars; and

forming a first interconnect structure over a first surface of the encapsulant, the first interconnect structure being electrically connected to the inductor pillars to form a 3D inductor.

15 . The method of claim 14 , further including:

removing the carrier; and

forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form the 3D inductor.

16 . The method of claim 15 , further including forming an integrated passive device within the first or second interconnect structures.

17 . The method of claim 14 , further including forming an inductor core over the carrier, the inductor pillars being disposed around the inductor core.

18 . The method of claim 14 , wherein a second remaining portion of the pillar frame provides an interconnect pillar.

19 . The method of claim 14 , further including forming a shielding layer over the semiconductor component.

20 . The method of claim 14 , further including forming a plurality of 3D inductors with the inductor pillars.

21 . A semiconductor device, comprising:

a semiconductor component;

an inductor core disposed in proximity to the semiconductor component;

a pillar frame mounted over the semiconductor component and inductor core;

an encapsulant deposited over the semiconductor component, pillar frame, and inductor core, wherein a portion of the pillar frame is removed to form inductor pillars around the inductor core;

a first interconnect structure formed over a first surface of the encapsulant; and

a second interconnect structure formed over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form a 3D inductor.

22 . The semiconductor device of claim 21 , wherein removing the portion of the pillar frame leaves an interconnect pillar.

23 . The semiconductor device of claim 21 , further including a shielding layer formed over the semiconductor component.

24 . The semiconductor device of claim 21 , further including an integrated passive device formed within the first or second interconnect structures.

25 . The semiconductor device of claim 21 , further including a plurality of 3D inductors formed with the inductor pillars.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053476/0094 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0427 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →