IP Library Granted Patent US 8,547,075
Granted Patent B1
US 8,547,075 · App. 13/155,547 · Granted Oct 1, 2013

Voltage regulators with a shared capacitor

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Quick Facts
Patent No.
US 8,547,075
App. No.
13/155,547
Granted
Oct 1, 2013
Kind
B1
Abstract

In one embodiment, an integrated circuit (e.g., FPGA) has two voltage regulators sharing stability and filter capacitors. A switch is located between each plate of each capacitor and a common voltage reference (e.g., ground) such that one of the two voltage regulators can be selectively connected to ground via the stability and filter capacitors.

Claims (39)

1. An integrated circuit comprising:

a first voltage regulator including:

an operational amplifier (op amp) having an input and a first output, the input connected to an internal node;

an output stage having an input and a second output, the input connected to the first output of the op amp and the second output connected to the internal node; and

a current sink connected to the internal node;

a second voltage regulator including:

an operational amplifier (op amp) having an input and a first output, the input connected to an internal node;

an output stage having an input and a second output, the input connected to the first output of the op amp and the second output connected to the internal node; and

a current sink connected to the internal node;

first and second switches, each switch having a first terminal for directly connecting the switch to a common voltage reference and a second terminal; and

a first capacitor having first and second plates, the first plate connected to the second terminal of the first switch and the internal node of the second voltage regulator and the second plate connected to the second terminal of the second switch and the internal node of the first voltage regulator,

wherein:

to operate the first voltage regulator, the first switch is closed and the second switch is open, such that the first plate of the first capacitor is directly connected to the common voltage reference and the second plate of the first capacitor is connected to the internal node of the first voltage regulator; and

to operate the second voltage regulator, the first switch is open and the second switch is closed, such that the first plate of the first capacitor is connected the internal node of the second voltage regulator and the second plate of the first capacitor is directly connected to the common voltage reference.

2. The integrated circuit of claim 1 , wherein the first capacitor is a filter capacitor.

3. The integrated circuit of claim 1 including:

third and fourth switches of the third and fourth switches having a first terminal for connecting the switch to the common voltage reference and a second terminal; and

a second capacitor having first and second plates, the first plate of the second capacitor connected to the second terminal of the third switch and the first output of the op amp of the second voltage regulator and the second plate of the second capacitor connected to the second terminal of the fourth switch and the first output of the op amp of the first voltage regulator,

wherein:

to operate the first voltage regulator, the third switch is closed and the second switch is open, such that the first plate of the second capacitor is connected to the common voltage reference and the second plate of the first capacitor is connected to the first output of the op amp of the first voltage regulator; and

to operate the second voltage regulator, the first switch is open and the second switch is closed, such that the first plate of the first capacitor is connected to the first output of the op amp of the second voltage regulator and the second plate of the first capacitor is connected to the common voltage reference.

4. The integrated circuit of claim 3 , wherein the second capacitor is a stability capacitor.

5. An integrated circuit comprising:

a first voltage regulator including a first operational amplifier (op amp) and an output stage connected to an output of the first op amp;

a second voltage regulator including a second operational amplifier (op amp) and an output stage connected to an output of the second op amp;

first and second switches, each switch having a first terminal for connecting the switch to a common voltage reference and a second terminal;

a stability capacitor having first and second plates, the first plate connected to the second terminal of the first switch and the output of the op amp of the second voltage regulator and the second plate connected to the second terminal of the second switch and the output of the op amp of the first voltage regulator;

third and fourth switches, each of the third and fourth switches having a first terminal for directly connecting the switch to the common voltage reference and a second terminal; and

a filter capacitor having first and second plates, the first plate connected to the second terminal of the third switch and an output of the output stage of the second voltage regulator and the second plate connected to the second terminal of the fourth switch and an output of the output stage of the first voltage regulator.

6. The integrated circuit of claim 5 , wherein:

an input of the first op amp is connected to the output of the output stage of the first voltage regulator; and

an input of the second op amp is connected to the output of the output stage of the second voltage regulator.

7. The integrated circuit of claim 5 , wherein:

the first voltage regulator includes:

a current sink; and

the current sink, the output of the output stage of the first voltage regulator, and the input of the first op amp are connected to an internal node of the first voltage regulator; and

the second voltage regulator includes:

a current sink; and

the current sink, the output of the output stage of the second voltage regulator, and the input of the second op amp are connected to an internal node of the second voltage regulator.

Assignments (4)
SECURITY INTEREST Recorded May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
SECURITY INTEREST Recorded Mar 24, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035308/0345 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2011
From: MOSINSKIS, PAULIUS; MONTGOMERY, KEITH
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 026409/0074 →