IP Library Granted Patent US 8,898,373
Granted Patent B1
US 8,898,373 · App. 13/172,772 · Granted Nov 25, 2014

System and method for improving wear-leveling performance in solid-state memory

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Quick Facts
Patent No.
US 8,898,373
App. No.
13/172,772
Granted
Nov 25, 2014
Kind
B1
Abstract

Embodiments of the invention are directed to systems and methods for improving wear leveling performance in solid-state memory. The embodiments described herein make more consistent the number of wear leveling operations that needs to be performed, so that sudden spikes in the number wear leveling operations may be reduced in solid-state memory. In one embodiment, a staggered threshold-based wear leveling approach is used to spread out the execution of wear leveling operations that otherwise would have been triggered in clusters. Under the staggered threshold-based approach, wear leveling is periodically triggered by different wear leveling thresholds that are associated with various units of solid-state memory such as a group of blocks, so that only a certain amount of units are wear leveled at any given time.

Claims (62)

1. A method of performing wear leveling operations in a non-volatile data storage subsystem that comprises blocks of memory, the method comprising:

receiving a command that specifies an erase operation on a superblock of a plurality of superblocks in the storage subsystem, said superblock comprising a plurality of blocks, each block residing in one of a plurality of dies in the storage subsystem, wherein each of the dies is associated with an individual wear leveling threshold that is based on (1) a position of the die within the plurality of dies and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block;

incrementing an erase counter associated with each block in said superblock to reflect said erase operation on the superblock; and

using said erase counters to control a timing with which wear leveling operations are performed on specific blocks in the superblock, the timing being determined by comparing at least one of said erase counters to at least one of the individual wear leveling thresholds associated with the dies to determine whether an individual wear leveling threshold has been reached.

2. The method of claim 1 , further comprising performing a wear leveling operation on a block of the superblock that is in the die in which its associated individual wear leveling threshold has been reached.

3. The method of claim 1 , wherein the individual wear leveling threshold associated with each of the dies is different.

4. The method of claim 1 , wherein the individual wear leveling threshold associated with each of the dies is assigned in accordance with a rotation.

5. The method of claim 1 , wherein the individual wear leveling threshold associated with each of the dies is a sum of a position number of the associated die and the interval threshold.

6. A data storage subsystem capable of regulating a maximum number of wear leveling operations triggered by an erase operation, the data storage subsystem comprising:

a non-volatile solid-state memory array comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile solid-state memory array; and

a controller configured to:

receive an erase command directed to a group of the plurality of groups of blocks; and

determine whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units, and

wherein each of the individual wear leveling thresholds is based on (1) a position of the memory unit within the plurality of memory units and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block.

7. The data storage subsystem of claim 6 , wherein each memory unit is a die.

8. The data storage subsystem of claim 7 , wherein the controller is configured to perform the wear leveling operation by at least:

assigning a first block in the group determined as needing wear leveling to a different group of blocks;

assigning, to the group in place of the first block, a second block with a smaller number of erase commands already performed than the first block; and

moving data in the second block to the first block.

9. The data storage subsystem of claim 6 , wherein each memory unit is a plane.

10. A data storage subsystem capable of regulating a maximum number of wear leveling operations triggered by an erase operation, the data storage subsystem comprising:

a non-volatile solid-state memory array comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile solid-state memory array; and

a controller configured to:

receive an erase command directed to a group of the plurality of groups of blocks; and

determine whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units, and

wherein the individual wear leveling threshold associated with a memory unit is a sum of (1) a position number of the associated memory unit within the plurality of memory units and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block.

11. The data storage subsystem of claim 10 , wherein the position number is assigned according to a rotation.

12. The data storage subsystem of claim 11 , wherein the rotation comprises traversing the plurality of memory units.

13. A data storage subsystem capable of regulating a maximum number of wear leveling operations triggered by an erase operation, the data storage subsystem comprising:

a non-volatile solid-state memory array comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile solid-state memory array; and

a controller configured to:

receive an erase command directed to a group of the plurality of groups of blocks;

determine whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed;

for each of the blocks in group, perform a modulo operation with (1) a difference between the number of erase commands already on the block and the individual wear leveling threshold associated with the memory unit to which the block is assigned and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block; and

select the block for a wear leveling operation when the modulo operation results in a zero remainder,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units.

14. A method for regulating a maximum number of wear leveling operations triggered by an erase operation in a non-volatile data storage subsystem comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile data storage subsystem, the method comprising:

receiving an erase command directed to a group of the plurality of groups of blocks; and

determining whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units, and

wherein each of the individual wear leveling thresholds is based on (1) a position of the memory unit within the plurality of memory units and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block.

15. The method of claim 14 , wherein each memory unit is a die.

16. The method of claim 14 , wherein the wear leveling operation comprises:

assigning a first block in the group determined as needing wear leveling to a different group of blocks;

assigning, to the group in place of the first block, a second block with a smaller number of erase commands already performed than the first block; and

moving data in the second block to the first block.

17. The method of claim 14 , wherein each memory unit is a plane.

18. A method for regulating a maximum number of wear leveling operations triggered by an erase operation in a non-volatile data storage subsystem comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile data storage subsystem, the method comprising:

receiving an erase command directed to a group of the plurality of groups of blocks; and

determining whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units, and

wherein the individual wear leveling threshold associated with a memory unit is a sum of (1) a position number of the associated memory unit within the plurality of memory units and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block.

19. The method of claim 18 , wherein the position number is assigned according to a rotation.

20. The method of claim 19 , wherein the rotation comprises traversing the plurality of memory units.

21. A method for regulating a maximum number of wear leveling operations triggered by an erase operation in a non-volatile data storage subsystem comprising a plurality of groups of blocks, the blocks within each group of blocks distributed across different ones of a plurality of memory units in the non-volatile data storage subsystem, the method comprising:

receiving an erase command directed to a group of the plurality of groups of blocks;

determining whether to perform a wear leveling operation on at least one block in the group of blocks to which the erase command is directed, the determining based at least on (1) a number of erase commands already performed on individual blocks within the group, and (2) one or more individual wear leveling thresholds associated with memory units to which the blocks in the group are distributed;

for each of the blocks in group, performing a modulo operation with (1) a difference between the number of erase commands already on the block and the individual wear leveling threshold associated with the memory unit to which the block is assigned and (2) an interval threshold denoting a minimum frequency at which a wear leveling operation is to be performed on a block; and

selecting the block for a wear leveling operation when the modulo operation results in a zero remainder,

wherein an individual wear leveling threshold associated with at least some memory units differs from an individual wear leveling threshold associated with at least some other memory units.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
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To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
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To: WESTERN DIGITAL TECHNOLOGIES, INC.
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PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
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PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
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SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2011
From: KANG, HO-FAN; PAJARO, CLIFF
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 026529/0624 →