Functional simulation redundancy reduction by state comparison and pruning
View Patent ↗Methods and systems initiate a simulation of an integrated circuit design. The simulation produces data that will exist in latches of the integrated circuit design when a device manufactured according to the integrated circuit design is operating. The methods and systems evaluate same-state latches associated with different portions of the simulation. If two of the same-state latches have the same state, given the same inputs and environmental conditions, the method and systems terminate a first portion of the simulation associated with a first of the same-state latches, but allow a second portion of the simulation associated with a second of the same-state latches to proceed.
1. A method comprising:
initiating a simulation of an integrated circuit design on a computerized simulator, said simulation producing data that will exist in latches of said integrated circuit design when a device manufactured according to said integrated circuit design is operating;
evaluating same-state latches associated with different portions of said simulation using said computerized simulator, said same-state latches switching less than a predetermined threshold; and
if two of said same-state latches have the same state given the same inputs and environmental conditions, adjusting said computerized simulator to terminate a first portion of said simulation associated with a first of said same-state latches and allowing a second portion of said simulation associated with a second of said same-state latches to proceed.
2. The method according to claim 1 , said different portions of said simulation comprising one of:
simulations being performed on the same portions of said integrated circuit design at different times; and
simulations being performed simultaneously on different portions of said integrated circuit design.
3. The method according to claim 1 , said same-state latches comprising control latches.
4. The method according to claim 1 , said same state comprising data values within said two of said same-state latches being within a predetermined percentage of each other.
5. The method according to claim 1 , said computerized simulator comprising a particular simulator machine.
6. A method comprising:
initiating a simulation of an integrated circuit design on a computerized simulator, said simulation producing data that will exist in latches of said integrated circuit design when a device manufactured according to said integrated circuit design is operating;
monitoring inputs provided to said integrated circuit design during said simulation using said computerized simulator;
monitoring environmental conditions of said integrated circuit design during said simulation using said computerized simulator;
evaluating same-state latches associated with different portions of said simulation using said computerized simulator; and
if at least two of said same-state latches have the same state given the same said inputs and said environmental conditions, adjusting said computerized simulator to terminate at least a first portion of simulation associated with at least a first of said same-state latches and allowing a second portion of said simulation associated with a second of said same-state latches to proceed.
7. The method according to claim 6 , said different portions of said simulation comprising one of:
simulations being performed on the same portions of said integrated circuit design at different times; and
simulations being performed simultaneously on different portions of said integrated circuit design.
8. The method according to claim 6 , said same-state latches comprising control latches that switch states less than a predetermined threshold.
9. The method according to claim 6 , said same state comprising data values within said at least two of said same-state latches being within a predetermined percentage of each other.
10. The method according to claim 6 , said computerized simulator comprising a particular simulator machine.
11. A computerized simulator comprising:
a processor;
a user interface operatively connected to said processor;
a non-transitory computer storage medium operatively connected to said processor, said non-transitory computer storage medium storing simulation instructions; and
an input/output port operatively connected to said processor, said input/output port receiving an integrated circuit design,
said processor executing said simulation instructions to initiate a simulation of said integrated circuit design provided through said input/output port, said simulation producing data that will exist in latches of said integrated circuit design when a device manufactured according to said integrated circuit design is operating;
said processor executing said simulation instructions to evaluate same-state latches associated with different portions of said simulation, said same-state latches switching less than a predetermined threshold; and
if two of said same-state latches have the same state given the same inputs and environmental conditions, said processor executing said simulation instructions to adjust said computerized simulator to terminate a first portion of said simulation associated with a first of said same-state latches and allowing a second portion of said simulation associated with a second of said same-state latches to proceed.
12. The computerized simulator according to claim 11 , said different portions of said simulation comprising one of:
simulations being performed on the same portions of said integrated circuit design at different times; and
simulations being performed simultaneously on different portions of said integrated circuit design.
13. The computerized simulator according to claim 11 , said same-state latches comprising control latches.
14. The computerized simulator according to claim 11 , said same state comprising data values within said two of said same-state latches being within a predetermined percentage of each other.
15. The computerized simulator according to claim 11 , said computerized simulator comprising a particular simulator machine.
16. A tangible computer readable storage medium being readable by a computerized device, said tangible computer readable storage medium storing instructions executable by said computerized device to perform a method comprising:
initiating a simulation of an integrated circuit design, said simulation producing data that will exist in latches of said integrated circuit design when a device manufactured according to said integrated circuit design is operating;
evaluating same-state latches associated with different portions of said simulation, said same-state latches switching less than a predetermined threshold; and
if two of said same-state latches have the same state given the same inputs and environmental conditions, terminating a first portion of said simulation associated with a first of said same-state latches and allowing a second portion of said simulation associated with a second of said same-state latches to proceed.
17. The tangible computer readable storage medium according to claim 16 , said different portions of said simulation comprising one of:
simulations being performed on the same portions of said integrated circuit design at different times; and
simulations being performed simultaneously on different portions of said integrated circuit design.
18. The tangible computer readable storage medium according to claim 16 , said same state latches comprising control latches that switch states less than a predetermined threshold.
19. The tangible computer readable storage medium according to claim 16 , said same state comprising data values within said two of said same-state latches being within a predetermined percentage of each other.
20. The tangible computer readable storage medium according to claim 16 , said computerized device comprising a particular simulator machine.