IP Library Granted Patent US 9,059,225
Granted Patent B2
US 9,059,225 · App. 13/259,871 · Granted Jun 16, 2015

Semiconductor device and the method of manufacturing the same

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Quick Facts
Patent No.
US 9,059,225
App. No.
13/259,871
Granted
Jun 16, 2015
Kind
B2
Abstract

A method for manufacturing a semiconductor device is provided with: a step of preparing a semiconductor wafer ( 22 ) in a state where the circumference of the semiconductor wafer, which has been divided into semiconductor device parts, is adhered on a dicing sheet ( 21 ) supported by a wafer ring ( 23 ); a step of fixing the wafer ring ( 23 ) after transferring the wafer ring to a table ( 14 ) where laser printing is to be performed; and a step of marking on the main surface where the semiconductor material of the semiconductor device parts which configure the semiconductor wafer ( 22 ) is exposed, by radiating laser beams through the dicing sheet and an adhesive layer.

Claims (35)

1. A semiconductor device comprising:

a semiconductor substrate having an element region formed therein and including a first main surface and a second main surface opposite to each other;

a wiring layer provided on a side of the first main surface of the semiconductor substrate and connected to the element region; and

a marking formed by applying a laser on the second main surface of the semiconductor substrate, wherein

the marking is provided with a plurality of recesses separated from each other by peripheral portions,

carbide of resin regions are directly attached to the plurality of recesses and the peripheral portions as a continuous layer, and

one of the carbide of resin regions adjacent to another one of the carbide of resin regions partially overlap each other.

2. The semiconductor device according to claim 1 , wherein the carbide of resin regions comprises a material formed by carbonizing an insulating adhesive.

3. The semiconductor device according to claim 1 , wherein the plurality of recesses each have a circular shape in a plan view, and each of the plurality of recesses and the carbide resin regions thereof are arranged concentrically with each other.

4. The semiconductor device according to claim 1 , wherein a semiconductor material is exposed in a region other than the region covered by the carbide resin regions.

5. A semiconductor device comprising:

a semiconductor substrate having an element region formed therein and including a first main surface and a second main surface opposite to each other;

a wiring layer provided on a side of the first main surface of the semiconductor substrate and connected to the element region; and

a marking structure on the second main surface of the semiconductor substrate, the marking structure comprising:

a plurality of recesses extending generally inward from the second main surface, wherein each recess is separated by portions of the second main surface, and

a carbide layer lining the plurality of recesses and overlapping the portions of the second main surface as a continuous layer, wherein the carbide layer comprises a plurality of carbonized regions, and wherein one of the carbonized regions adjacent to another one of the carbonized regions partially overlap each other.

6. The semiconductor device of claim 5 , wherein the carbide layer comprises a carbonized adhesive.

7. The semiconductor device of claim 6 , wherein the carbonized adhesive is formed by applying a laser on the second main surface while an insulating adhesive sheet is attached to the second main surface.

8. The semiconductor device of claim 5 , wherein the carbide layer comprises an acryl resin.

9. The semiconductor device of claim 5 , wherein the carbide layer includes at least seven percent by weight of carbon.

10. The semiconductor device of claim 5 , wherein the marking structure comprises a position mark and a sign mark.

11. The semiconductor device of claim 5 , wherein the recesses are linearly arranged and separated at substantially equal intervals.

12. The semiconductor device of claim 5 , wherein the plurality of recesses each have a circular shape in a plan view, and each of the plurality of recesses and the carbonized regions are arranged concentrically with each other.

13. The semiconductor device of claim 5 , wherein the carbide layer only partially covers the second main surface.

14. A semiconductor device comprising:

a semiconductor substrate having an element region formed therein and including a first main surface and a second main surface opposite to each other;

a wiring layer provided on a side of the first main surface of the semiconductor substrate and connected to the element region; and

a marking structure on the second main surface of the semiconductor substrate, the marking structure comprising:

a plurality of recesses extending generally inward from the second main surface and separated from each other by peripheral portions on the second main surface, and

a plurality of carbonized regions configured as a continuous layer directly on the plurality of recesses and directly on the peripheral portions, wherein one of the carbonized regions adjacent to another one of the carbonized regions partially overlap each other.

15. The semiconductor device of claim 14 , wherein each of the plurality of carbonized regions comprises a carbonized adhesive.

16. The semiconductor device of claim 15 , wherein the carbonized adhesive is formed by applying a laser on the second main surface while an insulating adhesive sheet is attached to the second main surface.

17. The semiconductor device of claim 14 , wherein the plurality of recesses is linearly arranged and separated at substantially equal intervals.

18. The semiconductor device of claim 14 , wherein each recess has a circular shape in a plan view, and wherein each recess and each carbonized region are arranged concentrically with each other.

19. The semiconductor device of claim 14 , wherein the plurality of carbonized regions only partially covers the second main surface.

Assignments (7)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2014
From: ON SEMICONDUCTOR TRADING SARL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032035/0470 →
CHANGE OF NAME Recorded Jan 23, 2014
From: ON SEMICONDUCTOR TRADING, LTD.
To: ON SEMICONDUCTOR TRADING SARL
Reel/Frame 032143/0286 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2011
From: KATO, TAKANORI; NAKATSUKA, ISAO
To: ON SEMICONDUCTOR TRADING, LTD.
Reel/Frame 026960/0911 →