Non-volatile memory packaging system with caching and method of operation thereof

1. A method of operation of a non-volatile memory packaging system comprising:

addressing an integrated circuit package having a system interface;

accessing a module controller, in the integrated circuit package, through an input register and an output data bus coupled to the system interface;

accessing a random access memory, in the integrated circuit package, by the module controller for restoring data from a non-volatile memory during power-up diagnostics including writing diagnostic data to the input register and reading the diagnostic data from the output data bus, through the system interface;

managing a routing multiplexer coupled between the system interface, the non-volatile memory, and the random access memory while the data from the non-volatile memory is restored to the random access memory; and

monitoring an address look-up register, by the module controller, for reading the data from the non-volatile memory or the random access memory through the system interface.

2. The method as claimed in claim 1 wherein managing the routing multiplexer, by the module controller, includes accessing the non-volatile memory through the system interface.

3. The method as claimed in claim 1 further comprising:

monitoring a system control bus by the system interface;

writing the input register with data from the system interface; and

activating a control decoder by the system interface responding to the system control bus for clocking the input register.

4. The method as claimed in claim 1 wherein writing to the non-volatile memory includes:

receiving a write command decode by the module controller;

sampling a random access memory full comparator by receiving the write command decode; and

zeroing a random access memory capacity counter after moving the data from the random access memory to the non-volatile memory.

5. The method as claimed in claim 1 further comprising receiving an erase command decode by the module controller includes erasing the non-volatile memory.

6. A method of operation of a non-volatile memory packaging system comprising:

addressing an integrated circuit package having a system interface;

accessing a module controller, in the integrated circuit package, through an input register and an output data bus coupled to the system interface including activating a command decoder in the module controller;

accessing a random access memory, in the integrated circuit package, by the module controller for restoring data from a non-volatile memory during power-up diagnostics including writing diagnostic data to the input register and reading the diagnostic data from the output data bus;

managing a routing multiplexer coupled between the system interface, the non-volatile memory, and the random access memory while the data from the non-volatile memory is restored to the random access memory including loading a speed matching register with the data; and

monitoring an address look-up register, by the module controller, for reading the data from the non-volatile memory, the random access memory, or a combination thereof through the system interface.

7. The method as claimed in claim 6 wherein managing the routing multiplexer, by the module controller, includes accessing the non-volatile memory through the system interface including executing a status command by the non-volatile memory.

8. The method as claimed in claim 6 further comprising:

monitoring a system data bus and a system control bus by the system interface;

writing the input register with data from the system data bus through the system interface; and

activating a control decoder by the system interface responding to the system control bus for clocking the input register.

9. The method as claimed in claim 6 wherein writing to the non-volatile memory includes:

receiving a write command decode by the module controller;

sampling a random access memory full comparator by receiving the write command decode; and

zeroing a random access memory capacity counter after moving the data from the random access memory to the non-volatile memory including writing the data from the write command decode into the random access memory.

10. The method as claimed in claim 6 further comprising receiving an erase command decode by the module controller includes erasing the non-volatile memory and resetting a random access memory address pointer.

11. A non-volatile memory packaging system comprising:

an integrated circuit package having a system interface;

a module controller, in the integrated circuit package, accessed through an input register and an output data bus coupled to the system interface;

a random access memory, in the integrated circuit package, coupled to the module controller for restoring data from a non-volatile memory during power-up diagnostics includes diagnostic data written to the input register and read from the output data bus through the system interface;

a routing multiplexer coupled between the system interface, the non-volatile memory, and the random access memory for writing the data from the non-volatile memory to restore the random access memory; and

an address look-up register, in the module controller, for locating the data from the non-volatile memory or the random access memory.

12. The system as claimed in claim 11 wherein the routing multiplexer coupled to the system interface, the module controller, and the non-volatile memory.

13. The system as claimed in claim 11 further comprising:

a system control bus input to the system interface; and

a control decoder activated by the system interface includes the system control bus coupled to the system interface for clocking the input register; and

wherein the input register is written with data from the system interface.

14. The system as claimed in claim 11 wherein the non-volatile memory written includes:

a write command decode from a control decoder detected by the module controller;

a random access memory full comparator activated by the write command decode; and

a random access memory capacity counter cleared after the data from the random access memory is moved to the non-volatile memory.

15. The system as claimed in claim 11 further comprising an erase command decode detected by the module controller includes the non-volatile memory erased.

16. The system as claimed in claim 11 further comprising:

a command decoder in the module controller; and

a speed matching register in the module controller coupled to the random access memory.

17. The system as claimed in claim 16 wherein the routing multiplexer coupled to the system interface, the module controller and the non-volatile memory including a status command executed by the non-volatile memory.

18. The system as claimed in claim 16 further comprising:

a system data bus and a system control bus input to the system interface; and

a control decoder activated by the system interface coupled to the system control bus for clocking the input register; and

wherein the input register is written with data from the system data bus through the system interface.

19. The system as claimed in claim 16 wherein the non-volatile memory written includes:

a write command decode from a control decoder detected by the module controller;

a random access memory full comparator activated by the write command decode;

a random access memory capacity counter cleared after the data from the random access memory is moved to the non-volatile memory; and

a system data bus copied to the random access memory by the module controller.

20. The system as claimed in claim 16 further comprising an erase command decode detected by the module controller includes the non-volatile memory erased and a random access memory address pointer reset.