Hybrid multi-level cell programming sequences

1. A memory device comprising:

a non-volatile memory comprising a multiple level cell (MLC);

a controller in communication with the non-volatile memory; and

firmware comprising:

multiple different programming techniques for establishing a charge configuration in the MLC that represents multiple data bits stored in the MLC; and

write logic that when executed by the controller causes the controller to:

obtain specified data to write to the MLC;

select among the multiple different programming techniques to determine a selected programming technique; and

write the specified data to the MLC using the selected programming technique.

2. The memory device of claim 1 , where the multiple different programming techniques comprise:

a robust programming technique that preserves previously written data in the MLC in the event of a write abort of the specified data; and

an additional programming technique that has higher average performance than the robust programming technique.

3. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that the previously written data exists in the MLC, and in response select the robust programming technique.

4. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that the previously written data exists in a lower page of the MLC, and in response select the robust programming technique to preserve the previously written data in the lower page in the event of the write abort.

5. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that no previously written data exists in the MLC, and in response select the additional programming technique to write the specified data.

6. The memory device of claim 1 , where the write logic, when executed, causes the controller to:

determine that the MLC exists in a particular unit of multiple MLCs;

determine a permissible programming technique predetermined for that particular unit; and

determine the selected programming technique according to the permissible programming technique for that particular unit.

7. The memory device of claim 1 , where the write logic, when executed, causes the controller to:

determine that the MLC is part of a particular unit of multiple MLCs that has already been written to with a particular one of the multiple different programming techniques, and in response select that particular one of the multiple different programming techniques for the MLC.

8. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that the MLC is part of a particular unit of multiple MLCs that has already been written to with the robust programming technique;

determine that no previously written data exists in the MLC; and

select the additional programming technique to write the specified data to the MLC.

9. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that the MLC is part of a particular unit of multiple MLCs;

determine that the specified data is part of a dataset that will fill the particular unit; and

in response, select the additional programming technique.

10. The memory device of claim 2 , where the write logic, when executed, causes the controller to:

determine that the MLC is part of a particular unit of multiple MLCs;

determine that the specified data is part of a datastream that may end partially through the particular unit; and

in response, select the robust programming technique.

11. A memory device comprising:

a non-volatile memory comprising multiple blocks of multiple level cells (MLCs), each block corresponding to a minimum erasable unit in the memory device;

a table comprising permissible programming technique identifiers for the blocks;

a controller in communication with the non-volatile memory; and

firmware comprising:

programming techniques for establishing charge configurations in the MLCs that represent multiple data bits stored in the MLCs, including:

a robust programming technique that preserves previously written data in the MLC in the event of a write abort of the specified data;

an additional programming technique that has higher average performance than the robust programming technique; and

write logic that when executed by the controller causes the controller to:

obtain specified data to write to the non-volatile memory;

determine a selected block among the multiple blocks in which to write the specified data;

determine an applicable permissible programming technique identifier for the selected block from among the multiple permissible programming technique identifiers;

select among the multiple different programming techniques to determine a selected programming technique based at least in part on the applicable permissible programming technique identifier; and

write the specified data using the selected programming technique.

12. The memory device of claim 11 , where the additional programming technical has higher average write performance than the robust programming technique.

13. The memory device of claim 11 , where the write logic, when executed, causes the controller to:

determine that no previously written data exists in the selected block, and in response select the additional programming technique to write the specified data when the applicable permissible programming technique identifier specifies the additional programming technique.

14. The memory device of claim 11 , where the write logic, when executed, causes the controller to:

determine that previously written data exists in a lower page of at least one of the MLCs in the selected block, and in response select the robust programming technique to preserve the previously written data when the applicable permissible programming technique identifier specifies the robust programming technique.

15. The memory device of claim 11 , where the write logic, when executed by the controller, further causes the controller to:

change the applicable permissible programming technique identifier for the selected block in the table to specify only the a selected programming technique.

16. A method for writing data to a multiple level cell (MLC) in a memory device, the method comprising, in the memory device:

obtaining specified data to write to the MLC;

selecting among multiple different programming techniques, each of which establishes a charge configuration in the MLC that represents multiple data bits, to determine a selected programming technique; and

writing the specified data to the MLC using the selected programming technique.

17. The method of claim 16 , where selecting comprises:

selecting among:

a robust programming technique that preserves previously written data in the MLC in the event of a write abort of the specified data; and

an additional programming technique that has higher average performance than the robust programming technique.

18. The method of claim 17 , where selecting comprises:

determining that the previously written data exists in the MLC, and in response selecting the robust programming technique.

19. The method of claim 17 , where selecting comprises:

determining that the previously written data exists in a lower page of the MLC, and in response selecting the robust programming technique to preserve the previously written data in the lower page in the event of the write abort.

20. The method of claim 17 , where selecting comprises:

determining that no previously written data exists in the MLC, and in response selecting the additional programming technique to write the specified data.

21. The method of claim 16 , where selecting comprises:

determining that the MLC exists in a particular unit of multiple MLCs;

determining a permissible programming technique for that particular unit; and

determining the selected programming technique according to the permissible programming technique.

22. The method of claim 16 , where selecting comprises:

determining that the MLC is part of a particular unit of multiple MLCs that has already been written to with a particular one of the multiple different programming techniques, and in response selecting that particular one of the multiple different programming techniques for the specified data.

23. The method of claim 17 , where selecting comprises:

determining that the MLC is part of a particular unit of multiple MLCs that has already been written to with the robust programming technique;

determining that no previously written data exists in the MLC; and

selecting the additional programming technique to write the specified data to the MLC.

24. The method of claim 17 , where selecting comprises:

determining that the MLC is part of a particular unit of multiple MLCs;

determining that the specified data is part of a dataset that will fill the particular unit; and

in response, selecting the additional programming technique.

25. The method of claim 17 , where selecting comprises:

determining that the MLC is part of a particular unit of multiple MLCs;

determining that the specified data is part of a datastream that may end partially through the particular unit; and

in response, selecting the robust programming technique.