Nonvolatile memory device using a tunnel oxide layer and oxygen blocking layer as a current limiter element
View Patent ↗Embodiments of the invention include a method of forming a nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, due to the addition of a current limiting component. In one embodiment, the current limiting component comprises a resistive material configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel oxide layer that is a current limiting material and an oxygen barrier layer that is an oxygen deficient material disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.
1. A nonvolatile memory element comprising:
a first layer operable as a first electrode;
a second layer operable as a second electrode;
a third layer disposed between the first layer and the second layer,
wherein the third layer is operable as a variable resistance layer and comprises a non-stoichiometric metal oxide;
a fourth layer operable as a current limiting layer,
wherein the fourth layer comprises second metal oxide,
wherein the fourth layer is disposed between the first layer and the third layer; and
a fifth layer disposed between the third layer the fourth layer,
wherein the fifth layer comprises a metal oxy-nitride and blocks oxygen migration between the third layer and the fourth layer,
wherein the fifth layer is amorphous or polycrystalline and has a grain size of 30 nanometers of less.
2. The nonvolatile memory element of claim 1 , wherein the thickness of the fifth layer is greater than or equal to a thickness of the third layer.
3. The nonvolatile memory element of claim 1 , wherein the first metal oxide of the third layer is selected from the group consisting of hafnium oxide, zirconium oxide, lanthanum oxide, and aluminum oxide.
4. The nonvolatile memory element of claim 1 , wherein the third layer has a thickness of between 20 angstroms and 100 angstroms.
5. The nonvolatile memory element of claim 1 , wherein the second metal oxide of the fourth layer is selected from the group consisting of aluminum oxide, zirconium oxide, silicon oxide, and tantalum oxide, and magnesium oxide.
6. The nonvolatile memory element of claim 1 , wherein the metal oxy-nitride of the fifth layer comprises a material selected from the group consisting of aluminum oxy-nitride, or titanium aluminum oxy-nitride.
7. The nonvolatile memory element of claim 1 , wherein the third layer further comprises a dopant.
8. The nonvolatile memory element of claim 1 , wherein the first metal oxide of the third layer comprises oxygen vacancies.
9. The nonvolatile memory element of claim 1 , wherein a breakdown voltage of the fourth layer is higher than a breakdown voltage of the third layer.
10. The nonvolatile memory element of claim 1 , wherein the first metal oxide of the third layer is hafnium oxide, wherein the second metal oxide of the fourth layer is aluminum oxide, and wherein the fifth layer comprises titanium aluminum oxy-nitride.
11. The nonvolatile memory element of claim 1 , wherein the fifth layer is amorphous.
12. The nonvolatile memory element of claim 1 , wherein the fifth layer is polycrystalline and has a grain size of 30 nanometers or less.
13. A nonvolatile memory element, comprising:
a first layer operable as a first electrode;
a second layer operable as a second electrode;
a third layer disposed between the first layer and the second layer,
wherein the third layer is operable as a variable resistance layer and comprises a non-stoichiometric metal oxide;
a fourth layer disposed between the first layer and the third layer,
wherein the fourth layer has a single resistive state,
wherein the fourth layer comprises a second metal oxide; and
a fifth layer disposed between the third layer the fourth layer,
wherein the fifth layer comprises a metal oxy-nitride and blocks oxygen migration, and
wherein the fifth layer has an electrical resistance that is less than one fifth of a combined electrical resistance of the first layer, the second layer, the third layer, the fourth layer and the fifth layer.
14. The nonvolatile memory element of claim 13 , wherein the electrical resistance of the fifth layer is no greater than one tenth of the combined electrical resistance of the first layer, the second layer, the third layer, the fourth layer and the fifth layer.
15. The nonvolatile memory element of claim 13 , wherein the metal oxide of the third layer is selected from the group consisting of hafnium oxide, zirconium oxide, lanthanum oxide and aluminum oxide.
16. The nonvolatile memory element of claim 13 , wherein the third layer has a thickness of between 20 angstroms and 100 angstroms.
17. The nonvolatile memory element of claim 13 , wherein the second oxide comprises a material selected from the group consisting of group consisting of aluminum oxide, zirconium oxide, silicon oxide, and tantalum oxide, and magnesium oxide.
18. The nonvolatile memory element of claim 13 , wherein the fourth layer has a thickness of between 20 angstroms and 500 angstroms.
19. The nonvolatile memory element of claim 13 , wherein the metal oxy-nitride of the fifth layer comprises a material selected from the group consisting of aluminum oxy-nitride, and titanium aluminum oxy-nitride.
20. The nonvolatile memory element of claim 9 , wherein the fifth layer has a thickness of between 10 angstroms and 100 angstroms.