Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate
View Patent ↗A semiconductor device has a first substrate with a central region. A plurality of bumps is formed around a periphery of the central region of the first substrate. A first semiconductor die is mounted to the central region of the first substrate. A second semiconductor die is mounted to the first semiconductor die over the central region of the first substrate. A height of the first and second die is less than or equal to a height of the bumps. A second substrate has a thermal conduction channel. A surface of the second semiconductor die opposite the first die is mounted to the thermal conductive channel of the second substrate. A thermal interface layer is formed over the surface of the second die. The bumps are electrically connected to contact pads on the second substrate. A conductive plane is formed over a surface of the second substrate.
1. A semiconductor device, comprising:
a first substrate;
a first semiconductor die mounted to the first substrate;
a second semiconductor die mounted over the first semiconductor die, the second semiconductor die including an active surface oriented toward the first substrate;
a second substrate including a thermal conduction channel, the second substrate being disposed over the first substrate with the second semiconductor die in thermal connection to the thermal conduction channel; and
a plurality of first bumps formed between the first substrate and second substrate with the first semiconductor die and second semiconductor die disposed within a height of the first bumps.
2. The semiconductor device of claim 1 , further including a plurality of second bumps disposed between the first semiconductor die and first substrate.
3. The semiconductor device of claim 1 , further including a thermal interface material disposed between the second semiconductor die and the thermal conduction channel of the second substrate.
4. The semiconductor device of claim 1 , further including a heat distribution layer disposed over a surface of the second substrate opposite the first semiconductor die and second semiconductor die.
5. The semiconductor device of claim 4 , wherein the thermal conduction channel is coupled to the heat distribution layer.
6. The semiconductor device of claim 1 , further including a conductive plane formed over a surface of the first substrate opposite the first semiconductor die and second semiconductor die.
7. A semiconductor device, comprising:
a first substrate;
a second substrate including a thermal conduction channel;
a first semiconductor die disposed between the first substrate and second substrate, the first semiconductor die including a non-active surface mounted to the thermal conduction channel;
a second semiconductor die disposed between the first semiconductor die and first substrate; and
a plurality of bumps formed between the first substrate and second substrate with the first semiconductor die disposed within a height of the bumps.
8. The semiconductor device of claim 7 , further including the second semiconductor die mounted to the first substrate within the height of the bumps.
9. The semiconductor device of claim 7 , further including a thermal interface material disposed between the first semiconductor die and the thermal conduction channel of the second substrate.
10. The semiconductor device of claim 7 , further including a heat distribution layer disposed over a surface of the second substrate opposite the first semiconductor die.
11. The semiconductor device of claim 10 , wherein the thermal conduction channel is coupled to the heat distribution layer.
12. The semiconductor device of claim 7 , further including a heat distribution layer disposed over the first semiconductor die and in thermal connection to the thermal conduction channel.
13. The semiconductor device of claim 7 , further including a conductive plane formed over a surface of the first substrate opposite the first semiconductor die.
14. A semiconductor device, comprising:
a first substrate including an insulating material;
a conductive layer formed vertically through the insulating material to form a thermal conduction channel;
a second substrate mounted to the first substrate;
a first semiconductor die mounted to the first substrate and second substrate with the first semiconductor die in thermal connection to the thermal conduction channel;
a plurality of bumps formed between the first substrate and second substrate with the first semiconductor die disposed within a height of the bumps; and
a second semiconductor die mounted to the second substrate within the height of the bumps.
15. The semiconductor device of claim 14 , further including a conductive via formed through the first semiconductor die.
16. The semiconductor device of claim 14 , further including a thermal interface material disposed between the first semiconductor die and the thermal conduction channel of the first substrate.
17. The semiconductor device of claim 14 , further including a heat distribution layer disposed over a surface of the first substrate opposite the first semiconductor die.
18. The semiconductor device of claim 14 , further including a heat distribution layer disposed over the first semiconductor die and in thermal connection to the thermal conduction channel.
19. A semiconductor device, comprising:
a first substrate including a conductive layer formed through the first substrate to form a thermal conduction channel;
a plurality of bumps formed over the first substrate; and
a first semiconductor die including a non-active surface mounted to the first substrate within a height of the bumps and in thermal connection to the thermal conduction channel.
20. The semiconductor device of claim 19 , further including a second substrate mounted to the first substrate with the first semiconductor die disposed between the first substrate and second substrate.
21. The semiconductor device of claim 20 , further including a second semiconductor die mounted to the second substrate within the height of the bumps.
22. The semiconductor device of claim 19 , further including a thermal interface material disposed between the first semiconductor die and the thermal conduction channel of the first substrate.
23. The semiconductor device of claim 19 , further including a heat distribution layer disposed over a surface of the first substrate opposite the first semiconductor die.
24. A semiconductor device, comprising:
a first substrate including a first conductive layer formed through the first substrate to form a thermal conduction channel;
a plurality of bumps formed over the first substrate;
a first semiconductor die disposed over the first substrate within a height of the bumps and in thermal connection to the thermal conduction channel; and
a thermal interface material disposed between the first semiconductor die and the thermal conduction channel of the first substrate.
25. The semiconductor device of claim 24 , further including a second substrate mounted to the first substrate with the first semiconductor die disposed between the first substrate and second substrate.
26. The semiconductor device of claim 24 , further including a second conductive layer disposed over the first semiconductor die and in thermal connection to the thermal conduction channel.
27. The semiconductor device of claim 24 , further including a second conductive layer disposed over a surface of the first substrate opposite the first semiconductor die.