Bipolar junction transistor with improved avalanche capability
View Patent ↗A bipolar junction transistor (BJT), which includes a collector layer, a base layer on the collector layer, an emitter layer on the base layer, and a recess region embedded in the collector layer, is disclosed. A base-collector plane is between the base layer and the collector layer. The recess region is may be below the base-collector plane. Further, the recess region and the base layer are a first type of semiconductor material. By embedding the recess region in the collector layer, the recess region and the collector layer form a first P-N junction, which may provide a point of avalanche for the BJT. Further, the collector layer and the base layer form a second P-N junction. By separating the point of avalanche from the second P-N junction, the BJT may avalanche robustly, thereby reducing the likelihood of avalanche induced failures, particularly in silicon carbide (SiC) BJTs.
1. A bipolar junction transistor comprising:
a collector layer;
a recess region embedded in the collector layer, such that the recess region is a first type of semiconductor material and is below a base-collector plane;
a base layer on the collector layer, such that the base layer is the first type of semiconductor material and the base-collector plane is between the base layer and the collector layer;
a first emitter layer on the base layer;
a collector, which comprises at least a portion of the collector layer;
a base, which comprises at least a portion of the base layer; and
an emitter, which comprises at least a portion of the first emitter layer, wherein the recess region is directly adjacent to the base.
2. The bipolar junction transistor of claim 1 wherein the collector layer comprises silicon carbide, the recess region comprises silicon carbide, and the base layer comprises silicon carbide.
3. The bipolar junction transistor of claim 2 wherein the first type of semiconductor material is P-type semiconductor material.
4. The bipolar junction transistor of claim 3 wherein the collector layer is a second type of semiconductor material, which is N-type semiconductor material.
5. The bipolar junction transistor of claim 2 wherein the first emitter layer comprises silicon carbide.
6. The bipolar junction transistor of claim 1 wherein the recess region and the collector layer form a body diode, such that the bipolar junction transistor is body-contacted.
7. A bipolar junction transistor comprising:
a collector layer;
a recess region embedded in the collector layer, such that the recess region is a first type of semiconductor material and is below a base-collector plane;
a base layer on the collector layer, such that the base layer is the first type of semiconductor material and the base-collector plane is between the base layer and the collector layer;
a first emitter layer on the base layer; and
a second emitter layer on the first emitter layer.
8. The bipolar junction transistor of claim 1 wherein the recess region and the collector layer form a first P-N junction, the collector layer and the base layer form a second P-N junction, and the base layer and the first emitter layer form a third P-N junction, such that the first P-N junction is deeper in the bipolar junction transistor than the second P-N junction and the third P-N junction.
9. The bipolar junction transistor of claim 1 wherein the recess region and the collector layer form a first P-N junction, which partially shields the collector from the base.
10. The bipolar junction transistor of claim 1 wherein the recess region is physically isolated from the base.
11. The bipolar junction transistor of claim 1 wherein the base further comprises supplemental base material between the base layer and the recess region.
12. The bipolar junction transistor of claim 7 wherein the recess region and the collector layer form a first P-N junction, which is adapted to provide a point of avalanche for the bipolar junction transistor.
13. The bipolar junction transistor of claim 7 further comprising an emitter, which comprises at least a portion of the first emitter layer and at least a portion of the second emitter layer.
14. The bipolar junction transistor of claim 7 wherein:
the recess region and the collector layer form a first P-N junction; and
the base layer and the collector layer form a second P-N junction, wherein,
during an avalanche event of the bipolar junction transistor, the bipolar junction is configured such that at least a portion of the avalanche event occurs in proximity to the first P-N junction instead of in proximity to the second P-N junction.
15. The bipolar junction transistor of claim 14 wherein the bipolar junction transistor is a silicon carbide bipolar junction transistor.
16. The bipolar junction transistor of claim 7 further comprising a substrate, such that the collector layer is on the substrate.
17. The bipolar junction transistor of claim 16 further comprising a collector, which comprises at least a portion of the collector layer and at least a portion of the substrate.
18. A circuit comprising:
a bipolar junction transistor comprising:
a collector comprising at least a portion of a collector layer;
a recess region embedded in the collector layer, such that the recess region is a first type of semiconductor material and is below a base-collector plane;
a base comprising at least a portion of a base layer on the collector layer, such that the base layer is the first type of semiconductor material and the base-collector plane is between the base layer and the collector layer;
an emitter comprising at least a portion of a first emitter layer on the base layer; and
an electrical interconnect coupled between the recess region and one of the base and the emitter.
19. The circuit of claim 18 wherein the collector layer comprises silicon carbide, the recess region comprises silicon carbide, and the base layer comprises silicon carbide.
20. The circuit of claim 19 wherein the first type of semiconductor material is P-type semiconductor material.
21. The circuit of claim 18 wherein the electrical interconnect is coupled between the recess region and the base.
22. The circuit of claim 21 wherein the recess region is directly adjacent to the base.
23. The circuit of claim 21 wherein the electrical interconnect is directly coupled between the recess region and the base.
24. The circuit of claim 18 wherein the electrical interconnect is coupled between the recess region and the emitter.
25. The circuit of claim 24 wherein the recess region is physically isolated from the base.
26. The circuit of claim 24 wherein the electrical interconnect is directly coupled between the recess region and the emitter.
27. The circuit of claim 18 wherein:
the recess region and the collector layer form a first P-N junction; and
the base layer and the collector layer form a second P-N junction, wherein,
during an avalanche event of the bipolar junction transistor, the circuit is configured such that at least a portion of the avalanche event occurs in proximity to the first P-N junction instead of in proximity to the second P-N junction.
28. The circuit of claim 27 wherein the bipolar junction transistor is a silicon carbide bipolar junction transistor.
29. A bipolar junction transistor comprising:
a collector layer;
a recess region at least partially embedded in the collector layer, such that the recess region is a first type of semiconductor material; and
a base at least partially embedded in the collector layer, such that the base is the first type of semiconductor material and a physical isolation region in the collector layer physically isolates the recess region from the base.
30. The bipolar junction transistor of claim 29 wherein the collector layer comprises silicon carbide, the recess region comprises silicon carbide, and the base comprises silicon carbide.
31. The bipolar junction transistor of claim 29 wherein the collector layer is a second type of semiconductor material, which is opposite from the first type of semiconductor material.
32. The bipolar junction transistor of claim 29 wherein the recess region and the collector layer form a first P-N junction, which is adapted to provide a point of avalanche for the bipolar junction transistor.