Device and method for forming sharp extension region with controllable junction depth and lateral overlap
A method for forming a semiconductor device includes forming a gate stack on a monocrystalline substrate. A surface of the substrate adjacent to the gate stack and below a portion of the gate stack is amorphorized. The surface is etched to selectively remove a thickness of amorphorized portions to form undercuts below the gate stack. A layer is epitaxially grown in the thickness and the undercuts to form an extension region for the semiconductor device. Devices are also provided.
1. A method for forming a semiconductor device, comprising:
forming a gate stack on a monocrystalline substrate;
amorphorizing a surface of the substrate adjacent to the gate stack and below a portion of the gate stack;
etching the surface to selectively remove a thickness of amorphorized portions to form undercuts underneath the gate stack, such that the undercuts are angled, where lower portions of the undercuts extend horizontally farther underneath the gate electrode than upper portions of the undercuts; and
epitaxially growing a layer in the thickness and the undercuts to form an extension region for the semiconductor device.
2. The method as recited in claim 1 , wherein the amorphorizing a surface of the substrate includes implanting an inert species to form an amorphous phase of the monocrystalline substrate.
3. The method as recited in claim 2 , wherein the inert species include one of Ge or Xe.
4. The method as recited in claim 1 , wherein amorphorizing a surface of the substrate includes controlling a depth of an amorphorized region by adjusting a power of implantation species.
5. The method as recited in claim 1 , wherein the amorphorizing a surface of the substrate includes implanting an inert species at an angle to amorphorize material below the gate stack.
6. The method as recited in claim 1 , wherein the angle is between about 5 degrees and about 20 degrees relative to a sidewall of the gate stack.
7. The method as recited in claim 1 , further comprising forming sidewall spacers on the gate stack with a temperature below 200 degrees Celsius after the amorphorizing step.
8. The method as recited in claim 1 , wherein etching the surface includes one of wet etching with NH 4 OH or baking with HCl to selectively etch the amorphorized portions with respect to the monocrystalline substrate.
9. The method as recited in claim 8 , wherein etching the surface includes tuning the etching to increase the selectivity of the etch process.
10. The method as recited in claim 1 , wherein epitaxially growing a layer includes in-situ doping the layer during growth of the layer.
11. The method as recited in claim 1 , further comprising forming a screen film on areas of the monocrystalline substrate adjacent to the gate stack to adjust a depth of the amorphorizing of the surface.
12. A method for forming a semiconductor device, comprising:
forming a gate stack on a monocrystalline substrate;
implanting an inert species to form an amorphous phase of the monocrystalline substrate on a surface of the substrate adjacent to the gate stack and below a portion of the gate stack, an amorphorized region is formed having a controlled depth by adjusting a power of implantation species;
etching the surface to selectively remove a thickness of the amorphorized region and to form undercuts underneath the gate stack, such that the undercuts are angled, where lower portions of the undercuts extend horizontally farther underneath the gate stack than upper portions of the undercuts; and
epitaxially growing a layer in the thickness and the undercuts to form an extension region for the semiconductor device.
13. The method as recited in claim 12 , wherein the inert species include one of Ge or Xe.
14. The method as recited in claim 12 , wherein implanting includes implanting the inert species at an angle to amorphorize material below the gate stack.
15. The method as recited in claim 14 , wherein the angle is between about 5 degrees and about 20 degrees relative to a sidewall of the gate stack.
16. The method as recited in claim 12 , further comprising forming sidewall spacers on the gate stack with a temperature below 200 degrees Celsius after the implanting step.
17. The method as recited in claim 12 , wherein etching the surface includes one of wet etching with NH 4 OH or baking with HCl to selectively etch the amorphorized region with respect to the monocrystalline substrate.
18. The method as recited in claim 17 , wherein etching the surface includes tuning the etching to increase the selectivity of the etch process.
19. The method as recited in claim 12 , wherein epitaxially growing a layer includes in-situ doping the layer during growth of the layer.
20. The method as recited in claim 12 , further comprising forming a screen film on areas of the monocrystalline substrate adjacent to the gate stack to adjust a depth of the amorphorized region.