Method of accessing stored information in multi-framed data transmissions
View Patent ↗The present invention discloses a method of accessing stored information in multi-framed data transmissions, comprising at least one control interface and at least one elastic store, wherein the control interface accesses the elastic store through a mailbox communications method. The control interface accesses the elastic store via the mailbox communications method, which comprises: (a) setting a address for a data location within said elastic store; (b) setting a request to read from, or write to, said data location within said elastic store; (c) issuing a “GO —————— ” signal to retrieve data information from said data location within said elastic store, by writing said “GO —————— ” signal to said microprocessor, which causes a circuit to read from said requested data location within said elastic store; (d) waiting for a possible, but not to be expected, de-assertion of a busy signal to be issued from said data location within said elastic store, and then; and then (e) reading back the value of said data information to said control interface. Where a busy signal occurs, the microprocessor must wait and issue a subsequent “GO —————— ” signal to retrieve the data information from the data location; where a busy signal does not occur the “GO —————— ” signal causes the circuit to read from the requested data location and send the data information hack to the microprocessor, where the data information is stored in a user-accessible register.
1. A system comprising:
register map circuitry coupled to a processor and an elastic store, wherein the register map circuitry is configured to:
receive from the processor an address for a data location within the elastic store and a request to read from the data location within the elastic store;
request data from the data location within the elastic store in response to receiving a signal issued by the processor;
store the requested data received from the elastic store in a processor-accessible memory of the register map circuitry;
receive from the processor a further address for a further data location within the elastic store and a request to write to the further data location within the elastic store; and
write the data to the further data location within the elastic store in response to receiving a further signal issued by the processor.
2. The system of claim 1 , wherein the processor is configured to access the elastic store for read operations using a mailbox communication method.
3. The system of claim 1 , wherein the register map circuitry is further configured to wait for a de-assertion of a busy signal associated with the data location of the requested data within the elastic store.
4. The system of claim 3 , wherein the register map circuitry is further configured to:
receive a further signal from the processor in response to receiving a busy signal associated with the data location of the requested data within the elastic store; and
request the data from the data location within the elastic store in response to the received further signal.
5. The system of claim 1 , wherein the register map circuitry is further configured to receive expected data from the processor, further comprising control circuitry configured to:
compare the expected data to data stored in the elastic store; and
provide an indication to the register map circuitry in response to detecting a disparity between the expected data and the data stored in the elastic store.
6. The system of claim 1 , wherein the data received from the elastic store comprises a portion of an OTN frame, a SONET frame, or an SDH frame.
7. The system of claim 1 , wherein the elastic store comprises Random Access Memory (RAM) circuitry.
8. The system of claim 1 , further comprising control circuitry configured to:
receive a plurality of incoming frames on a datapath; and
store portions of the plurality of incoming frames in the elastic store in response to determining that a predetermined number of the portions of the plurality of incoming frames are equal to each other.
9. The system of claim 1 , wherein the elastic store comprises Random Access Memory (RAM) circuitry.
10. A method comprising:
receiving from a processor, at a register map circuitry coupled to the processor and an elastic store, an address for a data location within the elastic store and a request to read from the data location within the elastic store;
requesting, with the register map circuitry, data from the data location within the elastic store in response to receiving a signal issued by the processor;
storing, with the register map circuitry, the requested data received from the elastic store in a processor-accessible memory of the register map circuitry;
receiving from the processor, at the register map circuitry, a further address for a further data location within the elastic store and a request to write to the further data location within the elastic store; and
writing, with the registry map circuitry, the data to the further data location within the elastic store in response to receiving a further signal issued by the processor.
11. The method of claim 10 , wherein the processor is configured to access the elastic store for read operations using a mailbox communication method.
12. The method of claim 10 , wherein further comprising waiting for a de-assertion of a busy signal associated with the data location of the requested data within the elastic store.
13. The method of claim 12 , further comprising:
receiving, with the register map circuitry, a further signal from the processor in response to receiving a busy signal associated with the data location of the requested data within the elastic store; and
requesting the data from the data location within the elastic store in response to the received further signal.
14. The method of claim 10 , further comprising:
receiving expected data from the processor;
comparing the expected data to data stored in the elastic store; and
providing an indication to the register map circuitry in response to detecting a disparity between the expected data and the data stored in the elastic store.
15. The method of claim 10 , wherein the data received from the elastic store comprises a portion of an OTN frame, a SONET frame, or an SDH frame.
16. The method of claim 10 , further comprising:
receiving a plurality of incoming frames on a datapath; and
storing portions of the plurality of incoming frames in the elastic store in response to determining that a predetermined number of the portions of the plurality of incoming frames are equal to each other.
17. A system comprising:
register map circuitry coupled to a processor and an elastic store, wherein the register map circuitry is configured to:
receive from the processor a request for a portion of a frame received on a datapath and an address for a data location of the portion of the received frame within the elastic store, wherein the portion of the received frame comprises an identifier of a source of the received frame and an identifier of a destination of the received frame;
request data from the data location within the elastic store in response to receiving a signal issued by the processor;
transmit a request to the elastic store for the portion of the received frame in response to receiving a signal issued by the processor;
store the portion of the received frame in a memory of the register map circuitry, wherein:
the processor is configured to access the portion of the received frame stored in the memory of the register map circuitry using a mailbox communications method;
receive from the processor a request to insert a further portion of a frame into a further frame that is to be transmitted on the datapath and a further address for a further data location within the elastic store, wherein the further portion of the frame that is to be transmitted on the datapath comprises an identifier of a source of the further frame that is to be transmitted on the datapath and an identifier of a destination of the further frame that is to be transmitted on the datapath; and
transmit to the elastic store a request to store the further portion of the frame to be inserted into the further frame that is to be transmitted on the datapath.