IP Library › Granted Patent US 8,778,764
Granted Patent B2
US 8,778,764 · App. 13/550,156 · Granted Jul 15, 2014

Method of making an insulated gate semiconductor device having a shield electrode structure and structure therefor

Inventor: Zia Hossain (Tempe, AZ)
Assignee: Semiconductor Components Industries, LLC
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Quick Facts
Patent No.
US 8,778,764
App. No.
13/550,156
Granted
Jul 15, 2014
Kind
B2
Abstract

In one embodiment, a semiconductor device includes a multi-portion shield electrode structure formed in a drift region. The shield electrode includes a wide portion formed in proximity to a channel side of the drift region, and a narrow portion formed deeper in the drift region. The narrow portion is separated from the drift region by a thicker dielectric region, and the wide portion is separated from the drift region by a thinner dielectric region. That portion of the drift region in proximity to the wide portion can have a higher dopant concentration than other portions of the drift region.

Claims (35)

1. A method for making an insulated gate semiconductor device having a shield electrode structure comprising:

providing a region of semiconductor material having a major surface;

forming a first trench extending from the major surface into the region of semiconductor material;

forming a dielectric structure along surfaces of the first trench, the dielectric structure comprising a first dielectric layer along surfaces of the first trench and a second dielectric layer overlying the first dielectric layer;

removing portions of the first and second dielectric layers along a lower surface of the first trench;

forming a second trench extending from the first trench into the region of semiconductor material;

forming a third dielectric layer along surfaces of the second trench, wherein the third dielectric layer is thicker than the dielectric structure;

forming a shield electrode within the second trench along the third dielectric layer and within a portion of the first trench along a portion of the dielectric structure, wherein the shield electrode has a wide portion adjacent the dielectric structure and a narrow portion adjacent the third dielectric layer;

removing a portion of the second dielectric layer after forming the shield electrode, wherein another portion of the second dielectric layer remains between the wide portion and the first dielectric layer;

forming an inter-electrode dielectric layer overlying the wide portion;

forming a gate electrode overlying the inter-electrode dielectric layer; and

forming a body region within the region of semiconductor material, wherein the body region and the first trench are adjacent.

2. The method of claim 1 further comprising forming a doped region within the region of semiconductor material in proximity to the wide portion but not in proximity to at least a portion of the narrow portion, wherein the body region is between the major surface and the doped region, and wherein the doped region has a higher dopant concentration than that of the region of semiconductor material.

3. The method of claim 1 , wherein forming the second dielectric layer includes forming a nitride layer.

4. A method for forming a semiconductor device comprising:

providing a region of semiconductor material having a semiconductor layer of a first conductivity type and having a major surface;

forming a trench structure;

forming a shield electrode within the trench structure having a first portion and a second portion, wherein the first portion is wider than the second portion, and wherein the first portion is separated at least in part from the semiconductor layer by a first dielectric layer, and wherein the second portion is separated from the semiconductor layer by a second dielectric layer that is thicker than the first dielectric layer;

forming a doped region of the first conductivity type in the semiconductor layer, wherein the doped region is in proximity to the first portion of the shield electrode but not in proximity to at least a portion of the second portion of the shield electrode, and wherein the doped region has a higher dopant concentration than that of the semiconductor layer;

forming an insulated gate electrode in the trench structure; and

forming a body region of a second conductivity type in the semiconductor layer extending from the major surface, wherein the body region and the trench structure are adjacent, wherein the body region is between the major surface and the doped region.

5. The method of claim 4 , wherein forming the doped region in proximity to the first portion but not adjoining any part of the second portion.

6. The method of claim 4 further comprising forming a dielectric liner between the first dielectric layer and the first portion.

7. The method of claim 6 , wherein forming the dielectric liner comprises forming a nitride liner.

8. A method for forming a semiconductor device comprising:

providing a region of semiconductor material having a semiconductor layer of a first conductivity type and having a major surface;

forming a trench structure extending from the major surface at least into the semiconductor layer;

forming a shield electrode within the trench structure having a first portion and a second portion, wherein the first portion is wider than the second portion, and wherein the first portion is separated at least in part from the semiconductor layer by a first dielectric layer, and wherein the second portion is separated from the semiconductor layer by a second dielectric layer that is thicker than the first dielectric layer;

forming a dielectric liner between the first dielectric layer and the first portion of the shield electrode;

forming an insulated gate electrode in the trench structure;

forming a body region of a second conductivity type in the semiconductor layer extending from the major surface, wherein the body region and the trench structure are adjacent; and

forming a source region of the first conductivity type in spaced relationship with the body region.

9. The method of claim 8 further comprising forming a doped region of the first conductivity type in the semiconductor layer in proximity to the first portion of the shield electrode, wherein the body region is between the major surface and the doped region, and wherein the doped region has a higher dopant concentration than that of the semiconductor layer.

10. The method of claim 9 , wherein forming the doped region includes forming the doped region in proximity to the first portion of the shield electrode but not in proximity to at least a portion of the second portion of the shield electrode.

11. The method of claim 8 , wherein forming the dielectric liner comprises forming a nitride liner.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 028559 FRAME 0088. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 18, 2016
From: HOSSAIN, ZIA
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038451/0129 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2012
From: HOSSAIN, ZIA
To: ON SEMICONDUCTOR
Reel/Frame 028559/0088 →
Continuity (1)
Related Publication 20140015039A1 · Jan 16, 2014