Semiconductor Die and Method of Forming through Organic Vias having Varying Width in Peripheral Region of the Die
A plurality of semiconductor die is mounted to a carrier separated by a peripheral region. An insulating material is deposited in the peripheral region. A first opening is formed in the insulating material of the peripheral region to a first depth. A second opening is formed in the insulating material of the peripheral region centered over the first opening to a second depth less than the first depth. The first and second openings constitute a composite through organic via (TOV) having a first width in a vertical region of the first opening and a second width in a vertical region of the second opening. The second width is different than the first width. A conductive material is deposited in the composite TOV to form a conductive TOV. An organic solderability preservative (OSP) coating is formed over a contact surface of the conductive TOV.
1 . A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an insulating material in a peripheral region around the semiconductor die;
forming a plurality of conductive vias partially through the insulating material, the conductive vias including a first width in a first vertical region of the insulating material and a second width different from the first width in a second vertical region of the insulating material; and
forming a first conductive layer between a first one of the conductive vias and a contact pad of the semiconductor die.
2 . The method of claim 1 , wherein the conductive vias extend from the insulating material.
3 . The method of claim 1 , wherein the conductive vias are recessed in the peripheral region.
4 . The method of claim 1 , further including forming an organic solderability preservative (OSP) coating over a surface of the conductive vias.
5 . The method of claim 1 , further including forming a plurality of rows of the conductive vias in the insulating material.
6 . The method of claim 1 , further including:
stacking a plurality of semiconductor die; and
electrically connecting the stacked semiconductor die through the conductive vias.
7 . A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing a first insulating material in a peripheral region around the semiconductor die;
forming a first conductive via in the first insulating material, the first conductive via including a first width and a second width different from the first width within the first insulating material; and
forming a conductive layer over a surface of the semiconductor die and electrically connected to the first conductive via.
8 . The method of claim 7 , wherein the first width is less than half the second width.
9 . The method of claim 7 , wherein the first conductive via extends from the first insulating material.
10 . The method of claim 7 , wherein the first conductive via is recessed in the peripheral region.
11 . The method of claim 7 , further including forming a second conductive via in an active area of the semiconductor die, the second conductive via being electrically connected to the first conductive via.
12 . The method of claim 7 , further including disposing a second insulating material within the first conductive via.
13 . The method of claim 7 , further including:
stacking a plurality of semiconductor die; and
electrically connecting the stacked semiconductor die through the first conductive via.
14 . A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an insulating material in a peripheral region around the semiconductor die; and
forming a first conductive via partially through the insulating material, the first conductive via including different widths within the insulating material.
15 . The method of claim 14 , further including forming a conductive layer over a surface of the semiconductor die and electrically connected to the first conductive via.
16 . The method of claim 14 , wherein the different widths of the first conductive via include a first width less than half a second width.
17 . The method of claim 14 , wherein the first conductive via extends from the insulating material.
18 . The method of claim 14 , wherein the first conductive via is recessed in the peripheral region.
19 . The method of claim 14 , further including forming a second conductive via in an active area of the semiconductor die, the second conductive via being electrically connected to one of the first conductive via.
20 . The method of claim 14 , further including:
stacking a plurality of semiconductor die; and
electrically connecting the stacked semiconductor die through the first conductive vias.
21 . A semiconductor device, comprising:
a semiconductor die;
an insulating material deposited in a peripheral region around the semiconductor die; and
a conductive via formed partially through the insulating material, the first conductive via including a first width and a second width different from the first width within the first insulating material.
22 . The semiconductor device of claim 21 , further including a conductive layer formed over a surface of the semiconductor die and electrically connected to the conductive via.
23 . The semiconductor device of claim 21 , wherein the different widths of the conductive via include a first width less than half a second width.
24 . The semiconductor device of claim 21 , wherein the conductive via extends from the insulating material.
25 . The semiconductor device of claim 21 , wherein the conductive via is recessed in the peripheral region.