Granted Patent E1

US 45,232 · App. 13/568,920 · Granted Nov 4, 2014

Abstract

Claims (39)

1. A method of manufacturing a semiconductor device comprising the steps of:

forming an insulating layer on a silicon substrate;

forming a contact hole on the insulating layer;

forming a selective silicon layer in the contact hole; and

forming a selective conductive plug on the selective silicon layer,

wherein the selective silicon layer is an episilicon layer formed in accordance with an UHVCVD process,

wherein, in applying the UHVCVD, SiH 2 Cl 2 gas and Cl 2 gas are supplied.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of forming a gate on the silicon substrate prior to the step of forming the insulating layer.

3. The method of manufacturing a semiconductor device according to claim 2 , wherein the gate is formed by one or more of polycrystalline silicons having a thickness of between 500 and 1500 Å, or tungsten having a thickness of between 500 and 1500 Å.

4. The method of manufacturing a semiconductor device according to claim 2 , further comprising the step of forming a hard mask comprising nitride having a thickness of between 1000 and 3000 Å on the upper part of the gate.

5. The method of manufacturing a semiconductor device according to claim 4 , wherein the hard mask comprising nitride is formed in accordance with an LPCVD process or a PECVD process.

6. The method of manufacturing a semiconductor device according to claim 2 , further comprising the step of forming an insulating layer spacer comprising nitride having a thickness of between 100 and 500 Å on the side of the gate.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein the insulating layer spacer of nitride is formed in accordance with an LPCVD process or a PECVD process.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein the selective silicon layer is an episilicon layer.

9. The method of manufacturing a semiconductor device according to claim 8 1, wherein the episilicon layer is formed to a thickness of between 1500 and 2000 Å in accordance with an LPCVD process or an UHVCVD process.

10. The method of manufacturing a semiconductor device according to claim 9 , wherein, in applying the LPCVD process, a H bake process is performed at a temperature of between 800 and 1000° C. for between 1 to 5 minutes.

11. The method of manufacturing a semiconductor device according to claim 9 , wherein, in applying the LPCVD process, SiH 2 Cl 2 gas and HCl gas are supplied at a rate between 10 and 500 sccm and at a pressure of between 5 and 300 Torr.

12. The method of manufacturing a semiconductor device according to claim 9 , wherein, in applying the UHVCVD process, a H bake process is performed at a temperature of between 400 and 800° C. and at a pressure of between 0.1 mTorr and 20 mTorr.

13. The method of manufacturing a semiconductor device according to claim 9 , wherein, in applying the UHVCVD, the SiH 2 Cl 2 gas and Cl 2 gas are supplied at a temperature of between 400 and 800° C. and a pressure of between 0.1 mTorr and 100 Torr.

14. The method of manufacturing a semiconductor device according to claim 1 , wherein the insulating layer is a BPSG oxide layer or an unmixed oxide layer, having a thickness of between 3000 and 7000 Å.

15. The method of manufacturing a semiconductor device according to claim 1 , wherein the selectively conductive plug comprises a layer of a material selected from a group comprising episilicon, polycrystalline silicon, titanium, and conductive metals.

16. The method of manufacturing a semiconductor device according to claim 15 , wherein the selectively conductive plug has a thickness of between 1000 and 3000 Å.

17. The method of claim 1, wherein the selectively conductive plug comprises a layer of titanium.

18. A method of manufacturing a semiconductor device comprising the steps of:

forming an insulating layer on a silicon substrate;

forming a contact hole on the insulating layer;

forming a selective silicon layer in the contact hole; and

forming a selective conductive plug on the selective silicon layer,

wherein the selective conductive plug comprises a layer of conductive metal; and

wherein the selective silicon layer is an episilicon layer formed in accordance with an UHVCVD process,

wherein, in applying the UHVCVD, SiH 2 Cl 2 gas and Cl 2 gas are supplied.

19. The method of manufacturing a semiconductor device according to claim 18, further comprising the step of forming a gate on the silicon substrate prior to the step of forming the insulating layer.

20. The method of manufacturing a semiconductor device according to claim 19, wherein the gate is formed by one or more of polycrystalline silicons having a thickness of between 500 and 1500 Å, or tungsten having a thickness of between 500 and 1500 Å.

21. The method of manufacturing a semiconductor device according to claim 19, further comprising the step of forming a hard mask comprising nitride having a thickness of between 1000 and 3000 Å on the upper part of the gate.

22. The method of manufacturing a semiconductor device according to claim 21, wherein the hard mask comprising nitride is formed in accordance with an LPCVD process or a PECVD process.

23. The method of manufacturing a semiconductor device according to claim 19, further comprising the step of forming an insulating layer spacer comprising nitride having a thickness of between 100 and 500 Å on the side of the gate.

24. The method of manufacturing a semiconductor device according to claim 23, wherein the insulating layer spacer of nitride is formed in accordance with an LPCVD process or a PECVD process.

25. The method of manufacturing a semiconductor device according to claim 18, wherein the episilicon layer is formed to a thickness of between 1500 and 2000 Å.

26. The method of manufacturing a semiconductor device according to claim 18, wherein the selectively conductive plug has a thickness of between 1000 and 3000 Å.

Assignments (8)