Solid-state drive retention monitor using reference blocks
View Patent ↗A solid-state storage retention monitor determines whether user data in a solid-state device is in need of a scrubbing operation. One or more reference blocks may be programmed with a known data pattern, wherein the reference block(s) experiences substantially similar P/E cycling, storage temperature, storage time, and other conditions as the user blocks. The reference blocks may therefore effectively represent data retention properties of the user blocks and provide information regarding whether/when a data refreshing operation is needed.
1. A data storage device capable of monitoring data-retention properties of solid-state memory, comprising:
a non-volatile solid-state memory array comprising a plurality of block groupings, each block grouping including one or more blocks; and
a controller configured to:
store a predetermined data pattern in a reference block, the reference block comprising a first block in a first block grouping from the plurality of block groupings, the reference block having data retention properties at least partially representative of data retention properties of a second block in the first block grouping;
read data values stored in the reference block;
determine an estimated amount of time that elapsed between the storing of the predetermined data pattern and the reading of the data values at least in part by calculating a bit error rate of the read data values based on comparing the read data values with the predetermined data pattern; and
determine a data scrubbing schedule based at least in part on the estimated amount of elapsed time.
2. The storage device of claim 1 , wherein the controller is configured to store the predetermined data pattern in the reference block in response to a wear leveling event.
3. The storage device of claim 1 , wherein the controller is further configured to select, as the reference block, a block that has a program-erase count that is the highest among the group of blocks.
4. The storage device of claim 1 , wherein the predetermined data pattern comprises a pseudo-random number generated using a known seed value.
5. The storage device of claim 1 , wherein the bit error rate provides information relating to a physical environment in which the non-volatile solid-state memory array was disposed during a past time period.
6. A method of monitoring data retention in a data storage device that comprises blocks of memory, the method comprising:
storing a first predetermined data pattern in a first reference block, the first reference block comprising a first block in a group of blocks of a data storage device, the first reference block having data retention properties at least partially representative of data-retention properties of a second block in the group of blocks;
reading data values stored in the first reference block to determine the data retention properties of the first reference block; and
calculating a time period for performing a future data scrubbing operation by calculating a bit error rate of the read data values based on comparing the read data values with the first predetermined data pattern;
wherein the method is performed under the control of a controller of the storage device.
7. The method of claim 6 , further comprising performing a data scrubbing operation on at least one block in the group of blocks during the time period.
8. The method of claim 7 , further comprising dynamically reassigning the first reference block to another block of the group of blocks following performance of the data scrubbing operation.
9. The method of claim 6 , further comprising:
determining whether a past data scrubbing operation was pending during a previous shut-down of the data storage device; and
when it is determined that the past data scrubbing operation was pending, resuming execution of the data scrubbing operation prior to calculating the future data scrubbing time period.
10. The method of claim 9 , further comprising storing a second predetermined data pattern in a second reference block, wherein the first reference block and second reference block are stored in different physical memory units of the data storage device.
11. The method of claim 6 , wherein calculating the future data scrubbing time period is at least partially based on a difference between the bit error rate and a predetermined threshold error rate.
12. The method of claim 6 , further comprising storing the first predetermined data pattern in one or more additional reference blocks, wherein calculating the future data scrubbing time period comprises calculating an average bit error rate of the first reference block and the additional reference blocks with respect to the first predetermined data pattern.
13. The method of claim 6 , wherein calculating the future data scrubbing time period comprises reading a page of the first reference block using a predetermined reference read level voltage and sweeping the read level voltage until a second predetermined data pattern is read from the first reference block.
14. The method of claim 6 , wherein calculating the future data scrubbing time period comprises determining a threshold voltage read level of a page of the first reference block and comparing said threshold voltage read level with a predetermined default voltage read level.
15. A method of monitoring data retention in a data storage device that comprises blocks of memory, the method comprising:
selecting a first block from a group of blocks of the data storage device as a first reference block, the first reference block having data retention properties at least partially representative of data-retention properties of a second block in the group of blocks;
reading data values stored in the first reference block to determine a shift in a threshold read voltage level between two programming levels of memory cells in the first reference block; and
calculating a time period for performing a future data scrubbing operation based at least in part on the determined shift in the threshold read voltage level,
wherein the method is performed under the control of a controller of the storage device.
16. The method of claim 15 , wherein the two programming levels include a highest programming level of the memory cells.
17. The method of claim 15 , wherein the two programming levels include second-highest and third-highest programming levels of the memory cells.
18. The method of claim 15 , wherein reading data values stored in the first reference block to determine a shift in a threshold read voltage level comprises performing a plurality of reads on the cells with different voltage thresholds to determine the shift.
19. The method of claim 18 , wherein the performing a plurality of reads on the cell comprises:
reading the cells with a voltage threshold;
determining an amount of error encountered;
adjusting the voltage threshold;
re-reading the cells with the adjusted voltage threshold and determining a change in the amount of error encountered; and
repeating the reading, determining and adjusting until a rate of the change in the amount of error encountered reaches a pre-determined saturation threshold.
20. A data storage device capable of monitoring data retention properties of solid-state memory, comprising:
a non-volatile solid-state memory array comprising a plurality of block groupings, each block grouping including one or more blocks; and
a controller configured to:
select a first block from a first block grouping of a plurality of block groupings of the data storage device as a first reference block, the first reference block having data retention properties at least partially representative of data-retention properties of a second block in the first block grouping;
read data values stored in the first reference block to determine a shift in a threshold read voltage level between two programming levels of memory cells in the first reference block; and
calculate a time period for performing a future data scrubbing operation based at least in part on the determined shift in the threshold read voltage level.
21. The data storage device of claim 20 , wherein the two programming levels include a highest programming level of the memory cells.
22. The data storage device of claim 20 , wherein the two programming levels include second-highest and third-highest programming levels of the memory cells.
23. The data storage device of claim 20 , wherein the controller is configured to read data values stored in the first reference block to determine a shift in a threshold read voltage level by performing a plurality of reads on the cells with different voltage thresholds to determine the shift.
24. The data storage device of claim 23 , wherein the performing a plurality of reads on the cell comprises:
reading the cells with a voltage threshold;
determining an amount of error encountered;
adjusting the voltage threshold;
re-reading the cells with the adjusted voltage threshold and determining a change in the amount of error encountered; and
repeating the reading, determining and adjusting until a rate of the change in the amount of error encountered reaches a pre-determined saturation threshold.