IP Library Granted Patent US 8,788,880
Granted Patent B1
US 8,788,880 · App. 13/592,218 · Granted Jul 22, 2014

Efficient retry mechanism for solid-state memory failures

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Quick Facts
Patent No.
US 8,788,880
App. No.
13/592,218
Granted
Jul 22, 2014
Kind
B1
Abstract

A data storage subsystem is disclosed that implements a solid-state data buffering scheme. Prior to completion of programming in solid-state storage media, data that is formatted for storage in solid-state media is maintained in one or more buffers. The system is able to retry failed programming operations directly from the buffers, rather than reprocessing the data. The relevant programming pipeline may therefore be preserved by skipping over a failed write operation and reprocessing the data at the end of the current pipeline processing cycle.

Claims (41)

1. A data storage system comprising:

a first volatile memory;

a second volatile memory;

a first non-volatile memory; and

a controller configured to:

upon detection of a power failure, preserve data in the first volatile memory by:

dividing one or more logical units of data in the first volatile memory into a plurality of data blocks in accordance with a storage format of the first non-volatile memory;

encoding the plurality of data blocks in accordance with the format;

storing the encoded data blocks in the second volatile memory;

submitting the encoded data blocks for storage in the first non-volatile memory; and

when an encoded data block encounters a storage failure in the first non-volatile memory, marking the failed data block in the second volatile memory for re-submission to the first non-volatile memory after completion of a current programming pipeline;

wherein the re-submission is performed without encoding another data block that corresponds to a common logical unit of data as the encoded data block that encountered the storage failure.

2. The data storage system of claim 1 further comprising a second non-volatile memory, wherein the first volatile memory serves as a buffer for the second non-volatile memory during normal operation of the system.

3. The data storage system of claim 2 , wherein the second non-volatile memory is a rotating magnetic media.

4. The data storage system of claim 1 , wherein the first volatile memory is used to store power-safe data for at least one internal process.

5. The data storage system of claim 1 , wherein the controller is further configured to:

after the failed data block is resubmitted:

confirm that storage of the encoded data blocks in the non-volatile memory was successful; and

reuse a portion of the second volatile memory after confirming successful storage.

6. The data storage system of claim 1 , wherein the controller is further configured to submit data blocks to multiple non-volatile memory channels in parallel.

7. The data storage system of claim 1 , wherein the one or more logical units of data in the first volatile memory each comprise a data portion and a coding portion.

8. The data storage system of claim 1 , wherein the controller is configured to allocate a maximum amount of data that may be stored in the first non-volatile memory following power loss.

9. The data storage system of claim 1 , wherein the first non-volatile memory comprises portions of a plurality of separate solid-state memory devices.

10. A method of reprogramming failed data writes to non-volatile memory, the method comprising:

detecting a power failure in a data storage system; and

in response to detecting the power failure:

dividing one or more logical units of data in a first volatile memory into a plurality of data blocks in accordance with a storage format of a first non-volatile memory;

encoding the plurality of data blocks in accordance with the format;

storing the encoded data blocks in a second volatile memory;

submitting the encoded data blocks for storage in the first non-volatile memory; and

in response to an encoded data block encountering a storage failure in the first non-volatile memory, marking the failed data block in the second volatile memory for re-submission to the first non-volatile memory after completion of a current programming pipeline;

wherein the re-submission is performed without encoding another data block that corresponds to a common logical unit of data as the encoded data block that encountered the storage failure.

11. The method of claim 10 , further comprising:

confirming that the encoded data blocks were successfully stored in the non-volatile memory was successful; and

reusing a portion of the second volatile memory after confirming successful storage.

12. The method of claim 10 , wherein encoding the plurality of data blocks comprises:

determining whether coding data of the plurality of data blocks is valid; and

generating solid-state coding data associated with the plurality of data blocks.

13. The method of claim 12 , wherein dividing the one or more logical units of data into a plurality of data blocks comprises combining multiple blocks of the one or more logical units into a single block of solid-state data.

14. The method of claim 13 , wherein dividing the one or more logical units of data into a plurality of data blocks comprises dividing a single block of the one or more logical units into multiple blocks of solid-state data.

15. The method of claim 10 , further comprising receiving a timeout signal or an error status from the first non-volatile memory indicating that the encoded data block encountered the storage failure.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2012
From: GOSLA, ASIF F.; MONDAL, CHIRANJEB
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 028831/0754 →