Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure
Disclosed is a semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure. The structure comprises a semiconductor device (e.g., a two-terminal device, such as a PN junction diode or Schottky diode, or a three-terminal device, such as a field effect transistor (FET), a bipolar junction transistor (BJT), etc.) and a dielectric layer that covers the semiconductor device. A contact extends vertically through the dielectric layer to a terminal of the semiconductor device (e.g., in the case of a FET, to a source/drain region of the FET). A contact sidewall spacer is positioned on the contact sidewall and incorporates an airgap. Since air has a lower dielectric constant than other typically used dielectric spacer or interlayer dielectric materials, the contact size can be increased for reduced parasitic resistance while minimizing corresponding increases in parasitic capacitance or the probability of shorts.
1. A semiconductor structure comprising a semiconductor device;
a dielectric layer covering said semiconductor device;
a contact having a sidewall and extending vertically through said dielectric layer to said semiconductor device; and
a contact sidewall spacer extending vertically through said dielectric layer to said semiconductor device,
said contact sidewall spacer being positioned laterally around said contact immediately adjacent to said sidewall,
said contact sidewall spacer having an essentially uniform width around said contact, and
said contact sidewall spacer comprising an airgap.
2. The semiconductor structure of claim 1 , said airgap being positioned laterally adjacent to a lower portion of said sidewall and said contact sidewall spacer further comprising a dielectric cap above said airgap and positioned laterally adjacent to an upper portion of said sidewall.
3. The semiconductor structure of claim 2 , said dielectric cap comprising a different dielectric material than said dielectric layer.
4. The semiconductor structure of claim 1 , said contact sidewall spacer further comprising a dielectric liner positioned laterally between said airgap and said sidewall.
5. The semiconductor structure of claim 4 , said dielectric liner comprising a different dielectric material than said dielectric layer.
6. The semiconductor structure of claim 1 , further comprising:
an additional contact having an additional sidewall, being positioned laterally adjacent to said semiconductor device and extending vertically through said dielectric layer to a top surface of any one of an insulator layer and a semiconductor substrate below said semiconductor device; and
an additional contact sidewall spacer extending vertically through said dielectric layer to said top surface,
said additional contact sidewall spacer being positioned laterally around said additional contact immediately adjacent to said additional sidewall,
said additional contact sidewall spacer having an essentially uniform width around said additional contact, and
said additional contact sidewall spacer comprising an additional airgap.
7. The semiconductor structure of claim 1 , said semiconductor device comprising any of a two-terminal semiconductor device and a three-terminal semiconductor device.
8. A semiconductor structure comprising
a field effect transistor comprising:
a semiconductor body comprising:
a channel region; and
a source/drain region adjacent to said channel region; and
a gate structure on said semiconductor body adjacent to said channel region;
a dielectric layer covering said field effect transistor;
a contact having a sidewall and extending vertically through said dielectric layer to said source/drain region; and
a contact sidewall spacer extending vertically through said dielectric layer to said source/drain region,
said contact sidewall spacer being positioned laterally around said contact immediately adjacent to said sidewall,
said contact sidewall spacer having an essentially uniform width around said contact, and
said contact sidewall spacer comprising an airgap.
9. The semiconductor structure of claim 8 , said airgap being positioned laterally adjacent to a lower portion of said sidewall and said contact sidewall spacer further comprising a dielectric cap above said airgap and positioned laterally adjacent to an upper portion of said sidewall.
10. The semiconductor structure of claim 9 , said dielectric cap comprising a different dielectric material than said dielectric layer.
11. The semiconductor structure of claim 8 , said contact sidewall spacer further comprising a dielectric liner positioned laterally between said airgap and said sidewall.
12. The semiconductor structure of claim 11 , said dielectric liner comprising a different dielectric material than said dielectric layer.
13. The semiconductor structure of claim 8 , further comprising:
an additional contact having an additional sidewall, being positioned laterally adjacent to said field effect transistor and extending vertically through said dielectric layer to a top surface of any one of an insulator layer and a semiconductor substrate below said field effect transistor; and
an additional contact sidewall spacer extending vertically through said dielectric layer to said top surface,
said additional contact sidewall spacer being positioned laterally around said additional contact immediately adjacent to said additional sidewall,
said additional contact sidewall spacer having an essentially uniform width around said additional contact, and
said additional contact sidewall spacer comprising an additional airgap.
14. The semiconductor structure of claim 8 , said essentially uniform width being approximately equal to a distance between said sidewall and an outer edge of a gate sidewall spacer on said gate structure.
15. A semiconductor structure comprising
a semiconductor device;
a dielectric layer covering said semiconductor device;
a contact having a sidewall and extending vertically through said dielectric layer to said semiconductor device; and
a contact sidewall spacer extending vertically through said dielectric layer to said semiconductor device,
said contact sidewall spacer being positioned laterally around said contact immediately adjacent to said sidewall,
said contact sidewall spacer having an essentially uniform width around said contact, and
said contact sidewall spacer comprising:
a dielectric liner immediately adjacent to said sidewall; and
an airgap between said dielectric liner and said dielectric layer.
16. The semiconductor structure of claim 15 , said airgap having a portion that extends laterally below said dielectric liner to said sidewall such that said dielectric liner is physically separated from said semiconductor device.
17. The semiconductor structure of claim 15 , said dielectric liner comprising a different dielectric material than said dielectric layer.
18. The semiconductor structure of claim 15 , said dielectric liner comprising a silicon nitride liner.
19. The semiconductor structure of claim 15 , further comprising:
an additional contact having an additional sidewall, being positioned laterally adjacent to said semiconductor device and extending vertically through said dielectric layer to a top surface of any one of an insulator layer and a semiconductor substrate below said semiconductor device; and
an additional contact sidewall spacer extending vertically through said dielectric layer to said top surface,
said additional contact sidewall spacer being positioned laterally around said additional contact immediately adjacent to said additional sidewall,
said additional contact sidewall spacer having an essentially uniform width around said additional contact, and
said additional contact sidewall spacer comprising: an additional dielectric liner immediately adjacent to said additional sidewall and an additional airgap between said additional dielectric liner and said dielectric layer.
20. The semiconductor structure of claim 15 , said semiconductor device comprising any of a two-terminal semiconductor device and a three-terminal semiconductor device.
21. A semiconductor structure comprising
a field effect transistor comprising:
a semiconductor body comprising:
a channel region; and
a source/drain region adjacent to said channel region; and
a gate structure on said semiconductor body adjacent to said channel region;
a dielectric layer covering said field effect transistor;
a contact having a sidewall and extending vertically through said dielectric layer to said source/drain region; and
a contact sidewall spacer extending vertically through said dielectric layer to said source/drain region,
said contact sidewall spacer being positioned laterally around said contact immediately adjacent to said sidewall,
said contact sidewall spacer having an essentially uniform width around said contact, and
said contact sidewall spacer comprising: a dielectric liner immediately adjacent to said sidewall and an airgap between said dielectric liner and said dielectric layer, said airgap having a portion that extends laterally below said dielectric liner to said sidewall such that said dielectric liner is physically separated from said source/drain region.
22. The semiconductor structure of claim 21 , said dielectric liner comprising a silicon nitride liner.
23. The semiconductor structure of claim 21 , said dielectric liner comprising a different dielectric material than said dielectric layer.
24. The semiconductor structure of claim 21 , further comprising:
an additional contact having an additional sidewall, being positioned laterally adjacent to said field effect transistor and extending vertically through said dielectric layer to a top surface of any one of an insulator layer and a semiconductor substrate below said field effect transistor; and
an additional contact sidewall spacer extending vertically through said dielectric layer to said top surface,
said additional contact sidewall spacer being positioned laterally around said additional contact immediately adjacent to said additional sidewall,
said additional contact sidewall spacer having an essentially uniform width around said additional contact, and
said additional contact sidewall spacer comprising: an additional dielectric liner immediately adjacent to said additional sidewall and an additional airgap between said additional dielectric liner and said dielectric layer.
25. The semiconductor structure of claim 21 , said essentially uniform width being approximately equal to a distance between said sidewall and an outer edge of a gate sidewall spacer on said gate structure.