Dual phase gallium nitride material formation on (100) silicon
A method for selective formation of a dual phase gallium nitride material on a (100) silicon substrate. The method includes forming a blanket layer of dielectric material on a surface of a (100) silicon substrate. The blanket layer of dielectric material is then patterned forming a plurality of patterned dielectric material structures on silicon substrate. An etch is employed that selectively removes exposed portions of the silicon substrate. The etch forms openings within the silicon substrate that expose a surface of the silicon substrate having a (111) crystal plane. A contiguous AlN buffer layer is then formed on exposed surfaces of each patterned dielectric material structure and on exposed surfaces of the silicon substrate. A dual phase gallium nitride material is then formed on a portion of the contiguous AlN buffer layer and surrounding each sidewall of each patterned dielectric material structure.
1. A method for selectively forming a dual phase gallium nitride material on a silicon substrate, said method comprising:
forming a blanket layer of dielectric material on an uppermost surface of a (100) silicon substrate;
patterning said blanket layer of dielectric material forming a plurality of patterned dielectric material structures on portions of the uppermost surface of the (100) silicon substrate and exposing other portions of the uppermost surface of the (100) silicon substrate;
etching said exposed other portions of the uppermost surface of the (100) silicon substrate to expose a surface having a ( 111 ) crystal plane within the (100) silicon substrate;
forming a contiguous AlN buffer layer on exposed surfaces of each of said patterned dielectric material structures and on exposed surfaces of the silicon substrate; and
forming a dual phase gallium nitride material on a portion of the contiguous AlN buffer layer and surrounding each sidewall of each of said patterned dielectric material structures, wherein said dual phase gallium nitride material comprises a wurtzite phase and a cubic phase, wherein the cubic phase defines at least a portion of an uppermost surface of the gallium nitride material.
2. The method of claim 1 , wherein a distance from a sidewall surface of one patterned dielectric material structure to a sidewall surface of a neighboring patterned dielectric material structure is from 200 nm to 500 nm.
3. The method of claim 1 , wherein a distance from a sidewall surface of one patterned dielectric material structure to a sidewall surface of a neighboring patterned dielectric material structure is from greater than 500 nm and up to 5000 nm.
4. The method of claim 1 , further comprising heating the etched silicon substrate including said plurality of patterned dielectric material structures in an atmosphere of hydrogen and prealuminizing the exposed surfaces of the silicon substrate.
5. The method of claim 1 , wherein said forming the contiguous AlN buffer layer comprises introducing an organoaluminum precursor and a nitride precursor and depositing said precursors at a temperature of 600° C. or greater.
6. The method of claim 1 , wherein said forming said dual phase gallium nitride material comprises metalorganic chemical vapor deposition (MOCVD), and said MOCVD is performed at a temperature from 850° C. or greater.
7. The method of claim 1 , wherein said cubic phase of said dual phase gallium nitride material has a shape of an inverted triangular and wherein a base of said inverted triangular constitutes the entirety of the uppermost surface of the dual phase gallium nitride material.
8. The method of claim 1 , further comprising forming at least one semiconductor device upon and within said dual phase gallium nitride material.
9. The method of claim 1 , further comprising:
forming another dielectric material on exposed surfaces of the contiguous AlN buffer layer, exposed surfaces of the dual phase gallium nitride material and exposed surfaces of the (100) silicon substrate;
planarizing the another dielectric material to provide a planar structure in which uppermost surfaces of the dual gallium nitride material, remaining AlN buffer layer, remaining portion of the another dielectric material and the patterned dielectric structures are coplanar with each other; and
forming at least one semiconductor device upon and within said dual phase gallium nitride material.
10. The method of claim 1 , further comprising forming a photonic device via placing contacts on an exposed bottommost surface of the (100) silicon substrate.
11. The method of claim 1 , further comprising:
removing a horizontal portion of said contiguous AlN buffer layer from atop each of said patterned dielectric material structures, wherein an uppermost surface of each of said patterned dielectric material structures is exposed;
removing each of said patterned dielectric material structures to expose a portion of the uppermost surface of the (100) silicon substrate;
epitaxially growing a semiconductor material on said exposed portion of the uppermost surface of the (100) silicon substrate; and
forming semiconductor devices upon and within the dual phase gallium nitride material and upon within said semiconductor material.
12. The method of claim 1 , further comprising:
removing a horizontal portion of said contiguous AlN buffer layer from atop each of said patterned dielectric material structures, wherein an uppermost surface of each of said patterned dielectric material structures is exposed;
removing each of said patterned dielectric material structures to expose a portion of the uppermost surface of the (100) silicon substrate;
removing exposed portions of a remaining portion of the contiguous AlN buffer layer exposing a portion of a sidewall surface of said dual phase gallium nitride material;
epitaxially growing a semiconductor material on said exposed portion of the uppermost surface of the (100) silicon substrate, wherein a gap is present between the semiconductor material and the exposed portion of the sidewall surface of said dual phase gallium nitride material; and
forming semiconductor devices upon and within the dual phase gallium nitride material and upon within said semiconductor material.
13. The method of claim 1 , further comprising
removing a horizontal portion of said contiguous AlN buffer layer from atop each of said patterned dielectric material structures, wherein an uppermost surface of each of said patterned dielectric material structures is exposed;
removing each of said patterned dielectric material structures to expose a portion of the uppermost surface of the (100) silicon substrate;
removing exposed portions of a remaining portion of the contiguous AlN buffer layer exposing a portion of a sidewall surface of said dual phase gallium nitride material;
forming a dielectric spacer on each exposed sidewall surface of said dual phase gallium nitride material;
epitaxially growing a semiconductor material on said exposed portion of the uppermost surface of the (100) silicon substrate; and
forming semiconductor devices upon and within the dual phase gallium nitride material and upon within said semiconductor material.