IP Library Granted Patent US 9,136,159
Granted Patent B2
US 9,136,159 · App. 13/678,058 · Granted Sep 15, 2015

Method and system for a semiconductor for device package with a die-to-packaging substrate first bond

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Quick Facts
Patent No.
US 9,136,159
App. No.
13/678,058
Granted
Sep 15, 2015
Kind
B2
Abstract

Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. The additional die may comprise electronic devices. The first semiconductor die may comprise an interposer die or may comprise electronic devices. The first semiconductor die may be bonded to the packaging substrate utilizing a mass reflow process or a thermal compression process. The additional die may be bonded to the first die utilizing a mass reflow process or a thermal compression process. The bonded die may be encapsulated in a mold material, which may comprise a polymer. The one or more additional die may comprise micro-bumps for coupling to the first semiconductor die.

Claims (80)

1. A method for semiconductor packaging, the method comprising:

bonding a silicon interposer die to a packaging substrate;

applying an underfill material between said bonded silicon interposer die and said packaging substrate; and

bonding one or more additional die to said bonded silicon interposer die;

wherein said one or more additional die comprise electronic devices; and

wherein said bonding of said one or more additional die comprises:

adhering said one or more additional die to an adhesive layer; and

bonding said adhered one or more additional die to the silicon interposer die.

2. The method according to claim 1 , wherein:

said bonding the silicon interposer die to said packaging substrate comprises bonding the silicon interposer die to the packaging substrate utilizing a thermal compression process.

3. The method according to claim 1 , comprising

bonding said one or more additional die to said silicon interposer die utilizing a thermal compression process.

4. The method according to claim 1 , wherein

said bonding of said one or more additional die comprises:

adhering a plurality of additional die to an adhesive layer; and

bonding the adhered plurality of additional die to the silicon interposer die.

5. The method according to claim 1 , wherein

said bonding of said one or more additional die comprises:

placing at least said silicon interposer die and said packaging substrate in a fixture that allows said silicon interposer die and said packaging substrate to flex in one direction but not in an opposite direction; and

processing said silicon interposer die, said packaging substrate, and said one or more additional die through a reflow process.

6. The method according to claim 1 , comprising, prior to said bonding of said silicon interposer die to said packaging substrate:

thinning a first semiconductor wafer, which comprises said silicon interposer die and is bonded to a support substrate, to expose through-silicon-vias in said silicon interposer die; and

removing said first semiconductor wafer from said support substrate.

7. The method according to claim 6 , wherein

said removing said first semiconductor wafer from said support substrate comprises:

forming a protective layer over backside bumps on said first semiconductor wafer;

attaching a first chuck to said protective layer;

attaching a second chuck to said support substrate; and

causing relative motion between said attached first chuck and said attached second chuck.

8. The method according to claim 1 , wherein

said silicon interposer die comprises through-silicon vias.

9. A method for semiconductor packaging, the method comprising:

generating a semiconductor package, said generating comprising:

bonding an interposer die to a packaging substrate;

applying an underfill material between said bonded interposer die and said packaging substrate;

bonding one or more additional die to said bonded interposer die, wherein said one or more additional die comprise electronic devices; and

applying an underfill material between said bonded one or more additional die and said bonded interposer die;

wherein:

an outer side perimeter of the one or more additional die is unbounded by a laminate structure;

said one or more additional die comprise micro-bumps for coupling to said interposer die; and

said bonding one or more additional die to said bonded interposer die comprises:

positioning said micro-bumps in respective wells in a layer disposed on said interposer die; and

bonding said micro-bumps to said interposer die.

10. The method according to claim 9 , wherein

a majority of a distance between an outer side perimeter of at least one of the one or more additional die and an outer edge of the semiconductor package comprises the mold material.

11. The method according to claim 1 , comprising

encapsulating said bonded silicon interposer die and said bonded one or more additional die in a mold material such that a majority of a distance between an outer side perimeter of at least one of the one or more additional die and an outer edge of the packaging substrate comprises the mold material.

12. The method according to claim 9 , wherein

the interposer die is devoid of electronic devices and comprises one or more of: silicon, glass, or an organic laminate material.

13. The method according to claim 1 , wherein

the interposer die is devoid of electronic devices and comprises one or more of: silicon, glass, or an organic laminate material.

14. A method for semiconductor packaging, the method comprising:

thinning a first semiconductor wafer, which comprises a silicon interposer die and is bonded to a support substrate, to expose through-silicon-vias in said silicon interposer die;

removing said first semiconductor wafer from said support substrate;

bonding the silicon interposer die to a packaging substrate;

applying an underfill material between said bonded silicon interposer die and said packaging substrate; and

bonding one or more additional die to said bonded silicon interposer die, wherein said one or more additional die comprise electronic devices.

15. The method according to claim 14 , wherein

said removing said first semiconductor wafer from said support substrate comprises:

forming a protective layer over backside bumps on said first semiconductor wafer;

attaching a first chuck to said protective layer;

attaching a second chuck to said support substrate; and

causing relative motion between said attached first chuck and said attached second chuck.

16. A method for semiconductor packaging, the method comprising:

bonding a silicon interposer die to a packaging substrate;

applying an underfill material between said bonded silicon interposer die and said packaging substrate; and

bonding one or more additional die to said bonded silicon interposer die;

wherein said one or more additional die comprise an electronic device;

wherein said one or more additional die comprise micro-bumps for coupling to said silicon interposer die; and

wherein said bonding one or more additional die to said bonded silicon interposer die comprises:

positioning said micro-bumps in respective wells in a layer disposed on said silicon interposer die; and

bonding said micro-bumps to said silicon interposer die.

17. The method according to claim 16 , comprising

forming the respective wells in the layer using one or more of photolithography and/or laser ablation.

18. The method according to claim 17 , wherein

said wells are a full depth of the layer.

19. The method according to claim 16 , wherein

said wells are partial depth wells in said layer.

20. The method according to claim 16 , wherein

the silicon interposer die is devoid of electronic devices.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
PATENT SECURITY AGREEMENT Recorded May 7, 2015
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 035613/0592 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2012
From: KELLY, MICHAEL G.; HUEMOELLER, RONALD PATRICK; HINER, DAVID JON; DO, WON CHUL
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 029311/0047 →