Super surge diodes
View Patent ↗The present disclosure relates to a semiconductor device having a Schottky contact that provides both super surge capability and low reverse-bias leakage current. In one preferred embodiment, the semiconductor device is a Schottky diode and even more preferably a Silicon Carbide (SiC) Schottky diode. However, the semiconductor device may more generally be any type of semiconductor device having a Schottky contact such as, for example, a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET).
1. A semiconductor device comprising:
a drift layer of a first conductivity type, the drift layer comprising:
a plurality of junction barrier shield element recesses in the drift layer within an active region of the drift layer; and
a plurality of implant regions extending into the drift layer from corresponding ones of the plurality of junction barrier shield element recesses, the plurality of implant regions being of a second conductivity type that is opposite the first conductivity type;
an epitaxial surge current injection region on the drift layer adjacent to the plurality of junction barrier shield element recesses;
a Schottky layer on the drift layer to form a Schottky junction between the Schottky layer and the drift layer; and
an ohmic layer on a surface of the epitaxial surge current injection region opposite the drift layer, wherein the Schottky layer further extends over a surface of the ohmic layer opposite the epitaxial surge current injection region.
2. The semiconductor device of claim 1 wherein a depth of each of the plurality of junction barrier shield element recesses is greater than or equal to 0.5 microns, and an additional depth of the plurality of implant regions is greater than or equal to 0.2 microns.
3. The semiconductor device of claim 1 wherein the drift layer is formed of Silicon Carbide.
4. The semiconductor device of claim 1 wherein the semiconductor device is a Schottky diode.
5. The semiconductor device of claim 1 wherein the semiconductor device is a Silicon Carbide Schottky diode.
6. The semiconductor device of claim 1 wherein the semiconductor device is a Silicon Carbide Schottky diode capable of conducting at least 10 times a rated current of the Schottky diode while maintaining a power density of less than 300 Watts per square centimeter.
7. The semiconductor device of claim 1 wherein a depth of each of the plurality of junction barrier shield element recesses is greater than or equal to 0.3 microns, and an additional depth of the plurality of implant regions is greater than or equal to 0.2 microns.
8. The semiconductor device of claim 1 wherein the Schottky layer further extends over a surface of the epitaxial surge current injection region opposite the drift layer.
9. The semiconductor device of claim 8 further comprising an anode contact on a surface of the Schottky layer.
10. The semiconductor device of claim 9 further comprising a diffusion barrier layer on the surface of the Schottky layer between the Schottky layer and the anode contact.
11. The semiconductor device of claim 1 wherein a turn-on voltage of a p-n junction formed between the epitaxial surge current injection region and the drift layer is greater than a turn-on voltage of the Schottky junction between the Schottky layer and the drift layer.
12. The semiconductor device of claim 11 wherein the turn-on voltage of the p-n junction formed between the epitaxial surge current injection region and the drift layer is such that the p-n junction formed between the epitaxial surge current injection region and the drift layer turns on when the semiconductor device is under a surge condition where a forward voltage of the semiconductor device is greater than a predefined threshold voltage.
13. The semiconductor device of claim 12 wherein the predefined threshold voltage is greater than a forward voltage of the semiconductor device at a rated current of the semiconductor device.
14. A semiconductor device comprising:
a drift layer of a first conductivity type, the drift layer comprising:
a plurality of junction barrier shield element recesses in the drift layer within an active region of the drift layer, wherein a depth of each of the plurality of junction barrier shield element recesses is greater than or equal to 0.3 microns, and an additional depth of the plurality of implant regions is greater than or equal to 0.2 microns; and
a plurality of implant regions extending into the drift layer from corresponding ones of the plurality of junction barrier shield element recesses, the plurality of implant regions being of a second conductivity type that is opposite the first conductivity type;
an epitaxial surge current injection region on the drift layer adjacent to the plurality of junction barrier shield element recesses; and
a Schottky layer on the drift layer to form a Schottky junction between the Schottky layer and the drift layer.
15. The semiconductor device of claim 14 wherein a turn-on voltage of a p-n junction formed between the epitaxial surge current injection region and the drift layer is greater than a turn-on voltage of the Schottky junction between the Schottky layer and the drift layer, where the turn-on voltage of the p-n junction formed between the epitaxial surge current injection region and the drift layer is such that the p-n junction formed between the epitaxial surge current injection region and the drift layer turns on when the semiconductor device is under a surge condition where a forward voltage of the semiconductor device is greater than a predefined threshold voltage.
16. The semiconductor device of claim 14 wherein the semiconductor device is a Silicon Carbide Schottky diode capable of conducting at least 10 times a rated current of the Schottky diode while maintaining a power density of less than 300 Watts per square centimeter.
17. A method of fabricating a semiconductor device comprising: providing a drift layer of a first conductivity type;
forming an epitaxial surge current injection region on the drift layer and a plurality of junction barrier shield element recesses in the drift layer, the epitaxial surge current injection region being highly doped of a second conductivity type that is opposite the first conductivity type;
implanting a dopant of the second conductivity type into the plurality of junction barrier shield element recesses to thereby form a plurality of implant regions extending into the drift layer from corresponding ones of the plurality of junction barrier shield element recesses; and
forming a Schottky layer on the drift layer to thereby form a Schottky junction between the Schottky layer and the drift layer, wherein the Schottky layer extends over the plurality of junction barrier shield element recesses such that the plurality of implant regions form an array of junction barrier shield regions in the drift layer below the Schottky junction.
18. The method of claim 17 wherein forming the epitaxial surge current injection region on the drift layer and the plurality of junction barrier shield element recesses in the drift layer comprises:
forming an epitaxial layer of the second conductivity type on the drift layer;
etching a plurality of recesses into the epitaxial layer opposite the drift layer at locations that correspond to desired locations for the plurality of junction barrier shield element recesses in the drift layer;
providing a mask on a portion of the epitaxial layer that corresponds to a desired region of the epitaxial layer to serve as the epitaxial surge current injection region; and
etching a portion of the epitaxial layer exposed by the mask to thereby form the epitaxial surge current injection region and the plurality of junction barrier shield element recesses on the drift layer.
19. The method of claim 18 wherein etching the plurality of recesses into the epitaxial layer comprises etching the plurality of recesses into the epitaxial layer while etching one or more alignment marks into the epitaxial layer.
20. A semiconductor device comprising:
a drift layer of a first conductivity type;
a plurality of epitaxial junction barrier shield regions located in a corresponding plurality of recesses in the drift layer, the plurality of epitaxial junction barrier shield regions being highly doped of a second conductivity type that is opposite the first conductivity type;
a Schottky layer on the drift layer to form a Schottky junction between the Schottky layer and the drift layer, wherein the Schottky layer extends over the plurality of epitaxial junction barrier shield regions such that the plurality of epitaxial junction barrier shield regions form an array of junction barrier shield regions within the drift layer below the Schottky junction; and
an ohmic layer on a surface of each epitaxial junction barrier shield region of the plurality of epitaxial junction barrier shield regions between the epitaxial junction barrier shield region and the Schottky layer.
21. The semiconductor device of claim 20 wherein the drift layer is formed of Silicon Carbide.
22. The semiconductor device of claim 20 wherein the semiconductor device is a Schottky diode.
23. The semiconductor device of claim 20 wherein the semiconductor device is a Silicon Carbide Schottky diode.
24. The semiconductor device of claim 20 wherein a turn-on voltage of p-n junctions formed between the plurality of epitaxial junction barrier shield regions and the drift layer is greater than a turn-on voltage of the Schottky junction between the Schottky layer and the drift layer.
25. The semiconductor device of claim 24 wherein the turn-on voltage of the p-n junctions formed between the plurality of epitaxial junction barrier shield regions and the drift layer is such that the p-n junctions formed between the plurality of epitaxial junction barrier shield regions and the drift layer turn on when the semiconductor device is under a surge condition where a forward voltage of the semiconductor device is greater than a predefined threshold voltage.
26. The semiconductor device of claim 25 wherein the predefined threshold voltage is greater than a forward voltage of the semiconductor device at a rated current of the semiconductor device.
27. The semiconductor device of claim 20 wherein a depth of each of the plurality of recesses is greater than or equal to 0.1 microns.
28. The semiconductor device of claim 20 further comprising an anode contact on a surface of the Schottky layer.
29. The semiconductor device of claim 28 further comprising a diffusion barrier layer on the surface of the Schottky layer between the Schottky layer and the anode contact.