IP Library Granted Patent US 8,847,187
Granted Patent B2
US 8,847,187 · App. 13/692,850 · Granted Sep 30, 2014

Method of forming anneal-resistant embedded resistor for non-volatile memory application

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Quick Facts
Patent No.
US 8,847,187
App. No.
13/692,850
Granted
Sep 30, 2014
Kind
B2
Abstract

Embodiments of the invention include a nonvolatile memory device that contains nonvolatile resistive random access memory device with improved device performance and lifetime. In some embodiments, nonvolatile resistive random access memory device includes a diode, a metal silicon nitride embedded resistor, and a resistive switching layer disposed between a first electrode layer and a second electrode layer. In some embodiments, the method of forming a resistive random access memory device includes forming a diode, forming a metal silicon nitride embedded resistor, forming a first electrode layer, forming a second electrode layer, and forming a resistive switching layer disposed between the first electrode layer and the second electrode layer.

Claims (28)

1. A nonvolatile resistive random access memory device, comprising:

a diode;

a metal silicon nitride embedded resistor; and

a resistive switching layer disposed between a first electrode layer and a second electrode layer;

wherein the metal silicon nitride comprises one or more elements from columns 4 through 7 of the periodic table.

2. The memory device of claim 1 , wherein the embedded resistor has a resistivity within a range from 1 to 4 ohm-cm.

3. The memory device of claim 2 , wherein the resistivity of the embedded resistor is substantially constant over a voltage range from 4 MV/cm to 8 MV/cm.

4. The memory device of claim 1 , wherein the embedded resistor has a resistance within a range from 90 kΩ to 210 kΩ.

5. The memory device of claim 1 , wherein the embedded resistor has a thickness between 50 angstroms and 500 angstroms (Å).

6. The memory device of claim 1 , wherein the embedded resistor comprises an amorphous material.

7. The memory device of claim 6 , wherein the embedded resistor remains substantially amorphous after being annealed at 750° C. for 60 seconds.

8. The memory device of claim 1 , wherein the embedded resistor comprises a ternary or quaternary compound of metal silicon nitride.

9. The memory device of claim 1 , wherein the metal silicon nitride comprises one or more of zirconium (Zr), vanadium (V), niobium (Nb), chromium (Cr), aluminum, (Al), hafnium (Hf), tantalum (Ta), titanium (Ti), tungsten (W), and molybdenum (Mo).

10. The memory device of claim 8 , wherein the ternary compound of said ternary or quaternary compound of metal silicon nitride comprises one or more of Hf x Si y N z , Ta x Si y N z , Ti x Si y N z , W x Si y N z , and Mo x Si y N z .

11. The memory device of claim 8 , wherein the quaternary compound of said ternary or quaternary compound of metal silicon nitride is Hf a Ta b Si y N z where a+b=x.

12. The memory device of claim 1 , wherein the metal silicon nitride of said resistor comprises silicon in a range from 0.1 at % to 75.0 at %.

13. A method of forming a resistive random access memory device, the method comprising:

forming a diode;

forming a metal silicon nitride embedded resistor;

forming a first electrode layer;

forming a second electrode layer;

forming a resistive switching layer disposed between the first electrode layer and the second electrode layer; and

annealing the memory device at 750° C. for 60 seconds after forming the second electrode layer.

14. The method of claim 13 , wherein forming the embedded resistor comprises a PVD, CVD, or ALD process.

15. The method of claim 13 , wherein the embedded resistor has a resistance of 90 kΩ to 210 kΩ and a resistivity within a range from 1 to 4 ohm-cm.

16. The memory device of claim 15 , wherein the resistivity of the embedded resistor is substantially constant over a voltage range from 4 MV/cm to 8 MV/cm.

17. The memory device of claim 13 , wherein the embedded resistor comprises a ternary or quaternary compound of metal silicon nitride and wherein the metal silicon nitride comprises one or more elements from columns 4 through 7 of the periodic table.

18. The memory device of claim 13 , wherein the metal silicon nitride comprises silicon in a range from 0.1 at % to 75.0 at %.

Assignments (5)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 040381/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2012
From: TENDULKAR, MIHIR; CHI, DAVID
To: INTERMOLECULAR, INC.; KABUSHIKI KAISHA TOSHIBA; SANDISK 3D LLC
Reel/Frame 029395/0246 →