IL-free MIM stack for clean RRAM devices
View Patent ↗A nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, and methods of forming the same. A nonvolatile memory element includes a first electrode layer formed on a substrate, a resistive switching layer formed on the first electrode layer, and a second electrode layer. The resistive switching layer comprises a metal oxide and is disposed between the first electrode layer and the second electrode layer. The elemental metal selected for each of the first and second electrode layers is the same metal as selected to form the metal oxide resistive switching layer. The use of common metal materials within the memory element eliminates the growth of unwanted and incompatible native oxide interfacial layers that create undesirable circuit impedance.
1. A nonvolatile memory element comprising:
a first electrode layer;
a second electrode layer;
a resistive switching layer disposed between the first electrode layer and the second electrode layer;
a first encapsulation layer formed between and directly contacting a first device interconnect layer and a bottom surface of the first electrode layer; and
a second encapsulation layer formed between and directly contacting a top surface of the second electrode layer and a second device interconnect layer,
wherein the first electrode layer, the second electrode layer and the resistive switching layer each comprise the same metal, and
wherein the first encapsulation layer and the second encapsulation layer each include a material that is reactive with oxygen,
wherein the first and second encapsulation layers comprise one or more of copper, aluminum, indium, gallium, niobium, or magnesium.
2. The nonvolatile memory element of claim 1 , wherein the resistive switching layer comprises a metal oxide layer.
3. The nonvolatile memory element of claim 1 , wherein the metal selected for the first electrode layer, the second electrode layer and the resistive switching layer comprises one or more of hafnium, tantalum, titanium, aluminum, lanthanum, yttrium, vanadium, dysprosium, niobium, ytterbium, tungsten or zirconium.
4. The nonvolatile memory element of claim 1 , wherein the resistive switching layer has a thickness from 2 to 5 angstroms.
5. The nonvolatile memory element of claim 1 , wherein the resistive switching layer has a thickness from 20 to 30 angstroms.
6. The nonvolatile memory element of claim 1 , wherein the metal used for the first electrode layer, the second electrode layer and the resistive switching layer comprises hafnium.
7. The nonvolatile memory element of claim 1 , wherein the metal used for the first electrode layer, the second electrode layer, and the resistive switching layer comprises aluminum.
8. The nonvolatile memory element of claim 1 , wherein the metal used for the first electrode layer, the second electrode layer, and the resistive switching layer comprises titanium.
9. A method of forming a nonvolatile memory element in a ReRAM device comprising:
forming a resistive switching layer over a first electrode layer;
forming a second electrode layer, so that the resistive switching layer is disposed between the first electrode layer and the second electrode layer;
forming a first encapsulation layer between and directly contacting a first device interconnect layer and a bottom surface of the first electrode layer; and
forming a second encapsulation layer between and directly contacting a top surface of the second electrode layer and a second device interconnect layer,
wherein the first electrode layer, the second electrode layer and the resistive switching layer each comprise the same metal, and
wherein the first encapsulation layer and the second encapsulation layer each include a material that is reactive with oxygen,
wherein the first and second encapsulation layers comprise one or more of copper, aluminum, indium, gallium, niobium, or magnesium.
10. The method of claim 9 , wherein the resistive switching layer comprises a metal oxide layer.
11. The method of claim 9 , wherein the metal selected for the first electrode layer, the second electrode layer and the resistive switching layer comprise one or more of hafnium, tantalum, titanium, aluminum, lanthanum, yttrium, vanadium, dysprosium, niobium, ytterbium, tungsten or zirconium.
12. The method of claim 9 , wherein the resistive switching layer has a thickness from 2 to 5 angstroms.
13. The method of claim 12 , wherein the resistive switching layer has a thickness from 20 to 30 angstroms.
14. The method of claim 9 , wherein the metal used for the first electrode layer, the second electrode layer and the resistive switching layer comprises hafnium.
15. The method of claim 9 , wherein the metal used for the first electrode layer, the second electrode layer and the resistive switching layer comprises aluminum.
16. The method of claim 9 , wherein the metal used for the first electrode layer, the second electrode layer and the resistive switching layer comprises titanium.
17. The nonvolatile memory element of claim 1 , wherein a first material included in the first encapsulation layer and a second material included in the second encapsulation layer are each more conductive than the metal included in the first electrode layer, the second electrode layer, and the resistive switching layer.
18. The method of claim 9 , wherein a first material included in the first encapsulation layer and a second material included in the second encapsulation layer are each more conductive than the metal included in the first electrode layer, the second electrode layer, and the resistive switching layer.