Gallium nitride power devices
Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.
1. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
wherein the cap is a p-type cap;
wherein the cap is a combination of a p-type AlGaN layer and an AlN layer;
a dielectric layer contacting the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device.
2. The structure of claim 1 , wherein the channel layer is directly adjacent to the cap.
3. The structure of claim 1 , wherein the dielectric layer is on the cap.
4. The structure of claim 1 , wherein the channel layer is adjacent to the cap and has an N-face adjacent to the cap.
5. The structure if claim 1 , wherein the dielectric layer is between the cap and the gate.
6. The structure of claim 1 , wherein the gate further comprises a slant field plate.
7. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the cap includes Al y GaN and Al x GaN, the Al y GaN is closer to the gate than the Al x GaN is and y>x.
8. The structure of claim 7 , wherein the Al y GaN and Al x GaN are doped p-type.
9. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the dielectric layer is a dopant diffusion layer, and a donor species in the dopant diffusion layer increases 2DEG charge density in an access region of the device.
10. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, wherein the dielectric layer is on the cap, and wherein the structure further includes a p-type layer between the gate and the cap.
11. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the dielectric layer forms a pinning layer and induces charge in an access region of the device.
12. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the structure further comprises a layer of AlN between the layer of AlGaN and the GaN channel layer.
13. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein a layer of GaN laterally surrounds a gate region in which the gate is located.
14. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the device includes a gate region beneath the gate and access regions on either side of the gate region, and the GaN channel layer is thicker in the access regions than in the gate region.
15. A structure that is part of an enhancement mode high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG, the heterostructure region comprising a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap;
wherein the device is an N-face enhancement mode high electron mobility transistor device, and wherein the device includes a gate region beneath the gate and access regions on either side of the gate region, and the layer of AlGaN is doped n-type in the access regions but not in the gate region.
16. A high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG formed by a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap;
a p-type cap on the layers that form the heterostructure region; and
a gate on the p-type cap; wherein
the channel layer has an N-face adjacent to the cap, and wherein the dielectric layer includes an aperture and the p-type cap is in the aperture.
17. The device of claim 16 , wherein dielectric layer is on the p-type cap.
18. A high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG formed by a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a p-type cap on the layers that form the heterostructure region; and
a gate on the p-type cap; wherein
the channel layer has an N-face adjacent to the cap, the device is an enhancement-mode transistor device, and the cap includes Al y GaN and Al x GaN, and y>x.
19. A high electron mobility transistor device, comprising:
a GaN buffer layer;
on the buffer layer, a heterostructure region and 2DEG formed by a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a p-type cap on the layers that form the heterostructure region; and
a gate on the p-type cap; wherein
the channel layer has an N-face adjacent to the cap, the device is an enhancement-mode transistor device, and the device includes a gate region beneath the gate and access regions on either side of the gate region, and the GaN channel layer is thicker in the access regions than in the gate region.
20. A high electron mobility transistor device, comprising:
a substrate;
on the substrate, a heterostructure region and 2DEG formed by a layer of AlGaN with an aluminum composition between 0 and 1 or equal to 1 and a GaN channel layer;
a cap on the layers that form the heterostructure region;
a dielectric layer formed on the layers that form the heterostructure region and adjacent to the cap; and
a gate on the cap; wherein
the cap includes Al y GaN and Al x GaN, the Al y GaN is closer to the gate than the Al x GaN is and y>x; and
the device is an enhancement mode high electron mobility transistor device.
21. The device of claim 20 , wherein the cap includes p-type dopants.