IP Library Patent Application 13727038
Patent Application
App. No. 13/727,038

METHOD OF FORMING VIA HOLE IN CIRCUIT BOARD

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Quick Facts
Patent No.
US None
App. No.
13/727,038
Abstract

A method of forming a via hole in a circuit board including an insulating layer and a metal layer disposed on each of top and bottom surfaces of the insulating layer, the method including: selectively removing a portion of each of the metal layers where the via hole is to be formed thereby exposing the insulating layer; and removing the exposed insulating layer, wherein the removing of the exposed insulating layer includes chemically swelling the exposed insulating layer and removing the swollen insulating layer.

Claims (28)

1 . A method of forming a via hole in a circuit board comprising an insulating layer, and a metal layer disposed on each of top and bottom surfaces of the insulating layer, the method comprising:

selectively removing a portion of each of the metal layers where the via hole is to be formed thereby exposing the insulating layer; and

removing the exposed insulating layer,

wherein the removing of the exposed insulating layer comprises chemically swelling the exposed insulating layer and removing the swollen insulating layer.

2 . The method of claim 1 , wherein the insulating layer comprises a glass structure material, and the removing of the exposed insulating layer further comprises etching the glass structure material.

3 . The method of claim 2 , wherein the etching of the glass structure material is performed before or after the removing of the swollen insulating layer.

4 . The method of claim 1 , wherein the selectively removing of the portion of each of the metal layers comprises:

coating a photosensitive resist on a surface of the each of the metal layers;

exposing and developing the photosensitive resist to expose the each of the metal layers based on patterns of the via hole; and

etching the each of the exposed metal layers to remove the portion of the each of the metal layers.

5 . The method of claim 4 , wherein the selectively removing of the portion of each of the metal layers further comprises removing the photosensitive resist that remains after the etching of the each of the exposed metal layers.

6 . The method of claim 1 , wherein a solvent selected from the group consisting of acid, alkaline, and neutral etchants is used in the chemically swelling of the exposed insulating layer.

7 . The method of claim 1 , wherein an ultrasonic wave is used in the removing of the swollen insulating layer.

8 . The method of claim 7 , wherein a range between 28 and 40 kHz of the ultrasonic wave is used in the removing of the swollen insulating layer.

9 . The method of claim 1 , wherein a high pressure water jet is used in the removing of the swollen insulating layer.

10 . The method of claim 9 , wherein a pressure of 5 kg/cm 2 of the high pressure water jet is used in the removing of the swollen insulating layer.

11 . The method of claim 1 , wherein the chemically swelling of the exposed insulating layer reduces intermolecular forces of the insulating layer within a predetermined range.

12 . A method of forming a via hole in a circuit board comprising, the method comprising:

providing an insulating layer with a first metal layer disposed on a first surface of the insulating layer and a second metal layer disposed on a second surface opposite of the first surface of the insulating layer;

exposing a portion of each of the first and second surfaces of the insulating layer by removing portions of each of the first and second metal layers;

reducing intermolecular forces of the insulating layer by applying a chemical solvent to the exposed portion of the insulating layer;

applying a physical external force to remove the exposed portion of the insulating layer thereby forming the via hole; and

performing a desmear process on inner sidewalls of the via hole.

13 . The method of claim 12 , wherein the insulating layer comprises a glass structure material, and the method further comprises etching the glass structure material.

14 . The method of claim 12 , wherein the exposing the portion of each of the first and second metal layers comprises:

coating a photosensitive resist on a surface of the each of the first and second metal layers;

exposing and developing the photosensitive resist to expose the each of the first and second metal layers based on patterns of the via hole; and

etching the each of the exposed first and second metal layers to expose the portion of the each of the first and second metal layers.

Assignments (3)
CHANGE OF NAME Recorded Apr 21, 2015
From: MDS CO. LTD.
To: HAESUNG DS CO., LTD.
Reel/Frame 035475/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2014
From: SAMSUNG TECHWIN CO., LTD.
To: MDS CO. LTD.
Reel/Frame 033327/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2012
From: KWON, SOON CHUL; LEE, SANG MIN
To: SAMSUNG TECHWIN CO., LTD.
Reel/Frame 029527/0538 →