Global register protection in a multi-threaded processor
View Patent ↗Global register protection in a multi-threaded processor is described. In an embodiment, global resources within a multi-threaded processor are protected by performing checks, before allowing a thread to write to a global resource, to determine whether the thread has write access to the particular global resource. The check involves accessing one or more local control registers or a global control field within the multi-threaded processor and in an example, a local register associated with each other thread in the multi-threaded processor is accessed and checked to see whether it contains an identifier for the particular global resource. Only if none of the accessed local resources contain such an identifier, is the instruction issued and the thread allowed to write to the global resource. Otherwise, the instruction is blocked and an exception may be raised to alert the program that issued the instruction that the write failed.
1. A method for managing global resources within a multi-threaded processor, the multi-threaded processor comprising a plurality of threads and the method comprising:
receiving an instruction from a thread to write to a global resource;
checking, using hardware logic, one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource; and
in response to determining that the thread has write access to the global resource, allowing the instruction to issue, wherein
checking one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource comprises:
checking one or more local control registers in the multi-threaded processor to determine whether the thread has write access to the global resource, wherein each local control register is associated with one of the plurality of threads.
2. A method according to claim 1 , further comprising:
in response to determining that the thread does not have write access to the global resource, preventing the instruction from issuing and raising an exception.
3. A method according to claim 1 , wherein checking one or more local control registers in the multi-threaded processor to determine whether the thread has write access to the global resource comprises:
accessing a local control register associated with each other thread in the multi-threaded processor; and
determining whether any accessed local control register identifies the global resource, wherein if none of the accessed local control registers identify the global resource, the thread has write access to the global resource.
4. A method according to claim 1 , wherein checking one or more local control registers in the multi-threaded processor to determine whether the thread has write access to the global resource comprises:
accessing a local control register associated with the thread; and
determining whether the accessed local control register identifies the global resource, wherein if the accessed local control register identifies the global resource, the thread has write access to the global resource.
5. A method according to claim 1 , further comprising:
receiving an instruction from a thread to write data identifying a global resource to a local control register associated with the thread;
accessing a local control register associated with each other thread in the multi-threaded processor;
determining whether any accessed local control register comprises data identifying the global resource; and
in response to determining that none of the accessed local control registers comprises data identifying the global resource, allowing the instruction to issue.
6. A method according to claim 5 , further comprising:
in response to determining that one of the accessed local control registers comprises data identifying the global resource, preventing the instruction from issuing and raising an exception.
7. A method according to claim 1 , wherein checking one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource comprises:
checking a global control field in a global register in the multi-threaded processor to determine whether the thread has write access to the global resource, the global control field being associated with the global resource.
8. A method according to claim 1 , further comprising:
receiving an instruction from a thread to read from a global resource;
checking one or more registers in the multi-threaded processor to determine whether the thread has read access to the global resource; and
in response to determining that the thread has read access to the global resource, allowing the instruction to issue.
9. A method according to claim 8 , further comprising:
in response to determining that the thread does not have read access to the global resource, preventing the instruction from issuing and raising an exception.
10. A method for managing global resources within a multi-threaded processor, the multi-threaded processor comprising a plurality of threads and the method comprising:
receiving an instruction from a thread to write to a global resource;
checking, using hardware logic, one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource;
in response to determining that the thread has write access to the global resource, allowing the instruction to issue,
receiving an instruction from a thread to read from a global resource;
checking one or more registers in the multi-threaded processor to determine whether the thread has read access to the global resource; and
in response to determining that the thread has read access to the global resource, allowing the instruction to issue,
wherein checking one or more registers in the multi-threaded processor to determine whether the thread has read access to the global resource comprises:
checking one or more local control registers in the multi-threaded processor to determine whether the thread has read access to the global resource, wherein each local control register is associated with one of the plurality of threads.
11. A method according to claim 10 , wherein checking one or more local control registers in the multi-threaded processor to determine whether the thread has read access to the global resource comprises:
accessing a local control register associated with each other thread in the multi-threaded processor; and
determining whether any accessed local control register identifies the global resource, wherein if none of the accessed local control registers identify the global resource, the thread has read access to the global resource.
12. A method according to claim 8 , wherein checking one or more registers in the multi-threaded processor to determine whether the thread has read access to the global resource comprises:
checking a global control field associated with the global resource in the multi-threaded processor to determine whether the thread has read access to the global resource.
13. A method according to claim 1 , wherein the instruction from a thread to write to a global resource comprises an instruction from a thread to write an alternative stack pointer to a global resource.
14. A method according to claim 1 , wherein the global resource comprises a global register.
15. A multi-threaded processor, comprising:
a plurality of threads;
at least one global resource;
hardware logic arranged to:
receive an instruction from one of the plurality of threads to write to a global resource;
check one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource; and
in response to determining that the thread has write access to the global resource, allow the instruction to issue; and
a plurality of local control registers, each local control register associated with one of the plurality of threads and wherein the hardware logic is further arranged to determine whether the thread has write access to the global resource by checking one or more of the local control registers.
16. A multi-threaded processor according to claim 15 , wherein the hardware logic is further arranged, in response to determining that the thread does not have write access to the global resource, to prevent the instruction from issuing and raise an exception.
17. A multi-threaded processor according to claim 15 , wherein each local control register comprises one or more control fields and each control field is arranged to store data identifying one or more global resources in the multi-threaded processor.
18. A multi-threaded processor according to claim 17 , wherein each control field is associated with a predefined task.