Compensation scheme to improve the stability of the operational amplifiers
A right-half plane (RHP) zero (RHZ) compensation scheme to improve the stability of the operational amplifier. A resistance R Z is implemented by a transistor. This transistor tracks process variations of the transistor drive by the op-amp to achieve better stability without requiring a bandwidth reduction. As a current source is not available to bias this transistor, a local bias circuit is used to provide this.
1. A voltage supply circuit comprising:
an output transistor connected between a first supply level and an output node of the voltage supply circuit;
an operational amplifier having a first input connected to a reference level and a second input connected to receive feedback derived from the level on the output node of the voltage supply circuit;
a first transistor connected between the first supply level and ground and having a gate connected to the output of the operational amplifier;
a first resistor through which the first transistor is connected to the first supply level, wherein the gate of the output transistor is connected to a node between the first resistor and the first transistor;
a first capacitance and a second transistor connected in series between the output of the operational amplifier and the node between the first resistor and the first transistor, where the gate of the second transistor is connected to receive a first voltage level; and
a bias circuit to provide the first voltage level, where the bias circuit includes:
a first leg having a current bias dependent upon the current at the output node of the voltage supply circuit;
a second leg that uses the bias level of the first leg, the second leg having one or more diode connected transistors connected in series though which the current of the second leg runs to ground, where the first voltage level is taken from a node of the second leg above the one or more diode connected transistors.
2. The voltage supply circuit of claim 1 , wherein the first leg of bias circuit includes a third transistor through which the current of the first leg runs to ground, wherein the gate of the third transistor is connected to receive the output of the operational amplifier.
3. The voltage supply circuit of claim 1 , wherein the number of diodes connected transistors connected in series is two.
4. The voltage supply circuit of claim 1 , wherein the first leg of bias circuit is connected to a second supply level through a diode connected PMOS transistor and the second leg of bias circuit is connected to the second supply level through a PMOS transistor whose gate is connected to the gate of the PMOS transistor of the first leg.
5. The voltage supply circuit of claim 4 , wherein the second supply level is of a lower voltage than the first supply level
6. The voltage supply circuit of claim 1 , wherein the output node of the voltage supply circuit is connected to ground through a voltage divider circuit, and wherein the second input of the operational amplifier receives feedback from a node of the voltage divider circuit.
7. The voltage supply circuit of claim 6 , wherein the voltage divider circuit includes a second and a third resistance connected in series between the output node of the voltage supply circuit and ground, wherein said node of the voltage divider is between the second and third resistors.
8. The voltage supply circuit of claim 1 , wherein the first supply level is greater than 10V.