Semiconductor device with increased safe operating area
View Patent ↗A semiconductor device includes a substrate having a surface, a composite body region disposed in the substrate, having a first conductivity type, and comprising a body contact region at the surface of the substrate and a well in which a channel is formed during operation, a source region disposed in the semiconductor substrate adjacent the composite body region and having a second conductivity type, and an isolation region disposed between the body contact region and the source region. The composite body region further includes a body conduction path region contiguous with and under the source region, and the body conduction path region has a higher dopant concentration level than the well.
1. A semiconductor device comprising:
a substrate having a surface;
a composite body region disposed in the substrate, having a first conductivity type, and comprising a body contact region at the surface of the substrate and a well in which a channel is formed during operation;
a source region disposed in the substrate adjacent the composite body region and having a second conductivity type; and
an isolation region disposed between the body contact region and the source region;
wherein:
the composite body region further comprises a body conduction path region contiguous with and under the source region;
the body conduction path region is electrically connected with the well; and
the body conduction path region has a higher dopant concentration level than the well.
2. The semiconductor device of claim 1 , wherein:
the body conduction path region comprises a further well adjacent the body contact region; and
the further well has a higher dopant concentration level than the well in which the channel is formed.
3. The semiconductor device of claim 2 , wherein the further well laterally extends across the isolation region and partially across the source region.
4. The semiconductor device of claim 1 , wherein the body conduction path region extends across about an outer half of the source region, the outer half positioned distal from the channel.
5. The semiconductor device of claim 1 , wherein a lateral spacing between the body conduction path region and the channel falls in a range from about 0.1 μm to about 0.3 μm.
6. The semiconductor device of claim 1 , wherein:
the body conduction path region comprises a source offset region disposed adjacent and under the source region; and
the source offset region has a higher dopant concentration level than the well.
7. The semiconductor device of claim 1 , wherein:
the body conduction path region comprises an opposing source extension region disposed adjacent and under the source region; and
the opposing source extension region has a higher dopant concentration level than the well.
8. The semiconductor device of claim 1 , further comprising a gate structure supported by the substrate, wherein the body conduction path region includes a region that extends under the gate structure.
9. The semiconductor device of claim 1 , wherein the source region lacks an extension region having the second conductivity type.
10. The semiconductor device of claim 1 , wherein the isolation region comprises a shallow trench isolation (STI) region.
11. An electronic apparatus comprising:
a substrate; and
a field-effect transistor device in the substrate, the field-effect transistor device comprising:
a first semiconductor region having a first conductivity type and comprising a well in which a channel is formed during operation; and
a second semiconductor region adjacent the first semiconductor region, configured to act as a current terminal for the field-effect transistor device, and having a second conductivity type;
wherein:
the first semiconductor region comprises an opposing extension region, the opposing extension region being contiguous with and disposed under the second semiconductor region and having the first conductivity type, the opposing extension region being electrically connected with the well to establish a secondary conduction path for the field-effect transistor device; and
the opposing extension region has a higher dopant concentration level than the well.
12. The electronic apparatus of claim 11 , wherein the opposing extension region extends across a portion of the second semiconductor region distal from the channel.
13. The electronic apparatus of claim 11 , wherein the second semiconductor region lacks a current terminal extension region having the second conductivity type.
14. The electronic apparatus of claim 11 , further comprising an isolation region at a surface of the substrate between the second semiconductor region and a contact region of the first semiconductor region.
15. The electronic apparatus of claim 14 , wherein:
the first semiconductor region further comprises a further well adjacent the contact region;
the further well has a higher dopant concentration level than the well in which the channel is formed; and
the further well laterally extends across the isolation region and partially across the second semiconductor region.
16. The semiconductor device of claim 1 , wherein the body conduction path region extends from the body contact region across an entire lateral extent of the isolation region.
17. The semiconductor device of claim 1 , wherein the composite body region further comprises a further body conduction path region that electrically connects the body contact region and the well, the further body conduction path region having a higher dopant concentration level than the well.
18. The semiconductor device of claim 1 , wherein:
the source region comprises a source extension region having the second conductivity type; and
the body conduction path region is contiguous with the source extension region and extends from the isolation region to the source extension region.
19. The semiconductor device of claim 1 , wherein:
the source region comprises a source extension region having the second conductivity type; and
the body conduction path region comprises a region that extends from the body contact region and across the isolation region, and laterally overlaps the source extension region.
20. The semiconductor device of claim 1 , wherein:
the source region comprises a source extension region having the second conductivity type;
the body conduction path region comprises:
a first region that extends from the body contact region and across the isolation region, laterally overlaps the source region, has a bottom deeper than the source extension region, and that electrically couples the body contact region and the well; and
a second region that extends from the isolation region to the source extension region; and
the first and second regions laterally overlap to be electrically connected with one another.