IP Library Granted Patent US 8,941,161
Granted Patent B2
US 8,941,161 · App. 13/888,680 · Granted Jan 27, 2015

Semiconductor device including finFET and diode having reduced defects in depletion region

Inventors: Veeraraghavan S. Basker (Schenectady, NY); Tenko Yamashita (Schenectady, NY)
Assignee: International Business Machines Corporation
H01L29/785
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Quick Facts
Patent No.
US 8,941,161
App. No.
13/888,680
Granted
Jan 27, 2015
Kind
B2
Abstract

A semiconductor device comprises a first substrate portion and a second substrate portion disposed a distance away from the first substrate portion. The first substrate portion includes a first active semiconductor layer defining at least one semiconductor fin and a first polycrystalline layer formed directly on the fin. The first polycrystalline layer is patterned to define at least one semiconductor gate. The second substrate portion includes a doped region interposed between a second active semiconductor region and an oxide layer. The oxide layer protects the second active semiconductor region and the doped region. The doped region includes a first doped area and a second doped area separated by the first doped region to define a depletion region.

Claims (8)

1. A semiconductor device, comprising:

a first substrate portion including a first active semiconductor layer defining at least one semiconductor fin and a first polycrystalline layer formed directly on the first active semiconductor layer, the first semiconductor layer defining at least one semiconductor gate; and

a second substrate portion separated from the first substrate portion by a predetermined distance, the second substrate portion including a doped region interposed between a second active semiconductor region and an oxide layer, the doped region including a first doped area and a second doped area separated by the first doped region to define a depletion region; and

a second polycrystalline material formed on an upper surface of the oxide layer to define a first ion implantation area adjacent a first side of the second polycrystalline material and a second ion implantation area adjacent a second side of the second polycrystalline material opposite the first side,

wherein the depletion region is integrally formed from the doped region, and wherein the first doped area, the second doped area and the depletion region define a diode.

2. The semiconductor device of claim 1 , wherein the oxide layer completely covers the second substrate portion.

3. The semiconductor device of claim 2 , wherein the first substrate portion excludes the oxide layer.

4. The semiconductor device of claim 1 , wherein the oxide layer has a thickness ranging from 15 nanometers to 30 nanometers.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2013
From: BASKER, VEERARAGHAVAN S.; YAMASHITA, TENKO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 030364/0747 →
Continuity (1)
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