Method to control metal semiconductor micro-structure
View Patent ↗A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm.
1. A method of a forming a metal semiconductor alloy comprising:
forming a first metal layer on a semiconductor substrate to provide an intermixed metal semiconductor region to a first depth of the semiconductor substrate without thermal diffusion;
removing a portion of the first metal layer that does not include the intermixed metal semiconductor region;
first annealing the intermixed metal semiconductor region to form a textured metal semiconductor alloy;
forming a second metal layer on the textured metal semiconductor alloy; and
second annealing the second metal layer on the textured metal semiconductor alloy, wherein diffusion of metal elements from the second metal layer through the textured metal semiconductor alloy provides a templated metal semiconductor alloy having a grain size that is greater than 2.0×, wherein the templated metal semiconductor alloy has a thickness ranging from 15 nm to 50 nm.
2. The method of claim 1 , wherein the textured metal semiconductor alloy has a crystal structure that is single crystal and the templated metal semiconductor alloy has a crystalline structure that is single crystal.
3. The method of claim 1 , wherein the crystal structure of the textured metal semiconductor alloy has a same orientation as the crystal structure of the templated metal semiconductor alloy.
4. The method of claim 1 , wherein the templated metal semiconductor alloy comprises metal semiconductor crystal grains having an in-plane texture to semiconductor crystal grains of the substrate at an interface between the substrate and the templated metal semiconductor alloy.
5. The method of claim 1 , wherein the metal semiconductor contact does not agglomerate up to temperatures of 750° C.
6. The method of claim 1 further comprising removing oxide from the textured metal semiconductor alloy with a selective etch prior to forming the second metal layer.
7. A method of forming a semiconductor device comprising:
providing a substrate comprising a source region and a drain region on opposing sides of a sacrificial gate structure;
forming a first metal layer on at least one of the source region and the drain region to provide an intermixed metal semiconductor region to a first depth of the semiconductor substrate without thermal diffusion;
removing a portion of the first metal layer that does not include the intermixed metal semiconductor region;
first annealing the intermixed metal semiconductor region to form a textured metal semiconductor alloy to a first depth of the substrate;
forming at least one dielectric layer on the textured metal semiconductor alloy having a first opening exposing the sacrificial gate structure;
replacing the sacrificial gate structure with a functioning gate structure;
etching a second opening through the at least one dielectric layer selective to the textured metal semiconductor alloy;
forming a second metal layer on the textured metal semiconductor alloy; and
second annealing the second metal layer on the textured metal semiconductor alloy to form a templated semiconductor alloy to a second depth of the substrate that is greater than the first depth of the substrate, wherein the textured metal semiconductor alloy and the templated semiconductor alloy provide a metal semiconductor alloy contact to the at least one of the source region and the drain region.
8. The method of claim 7 , wherein the a templated semiconductor alloy has a grain size that is greater than 2× a thickness of the metal semiconductor alloy for a metal semiconductor alloy having ranging from 15 nm to 50 nm.
9. The method of claim 7 , wherein the textured metal semiconductor alloy has a crystal structure that is single crystal and the templated metal semiconductor alloy has a crystalline structure that is single crystal.
10. The method of claim 7 , wherein the crystal structure of the textured metal semiconductor alloy has a same orientation as the crystal structure of the templated metal semiconductor alloy.
11. The method of claim 7 , wherein the templated metal semiconductor alloy comprises metal semiconductor crystal grains having an in-plane texture to semiconductor crystal grains of the substrate at an interface between the substrate and the templated metal semiconductor alloy.
12. The method of claim 7 , wherein the metal semiconductor alloy contact does not agglomerate up to temperatures of 750° C.
13. The method of claim 7 further comprising removing oxide from the textured metal semiconductor alloy with a selective etch prior to forming the second metal layer.