IP Library Granted Patent US 9,091,820
Granted Patent B2
US 9,091,820 · App. 13/914,049 · Granted Jul 28, 2015

Communication system die stack

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Quick Facts
Patent No.
US 9,091,820
App. No.
13/914,049
Granted
Jul 28, 2015
Kind
B2
Abstract

A high density, low power, high performance information system, method and apparatus are described in which perpendicularly oriented processor and memory die stacks ( 130, 140, 150, 160, 170 ) include integrated deflectable MEMS optical beam waveguides (e.g., 190 ) at each die edge to provide optical communications ( 182 - 185 ) in and between die stacks by supplying deflection voltages to a plurality of deflection electrodes ( 195 - 197 ) positioned on and around each MEMS optical beam waveguide ( 193 - 194 ) to provide two-dimensional alignment and controlled feedback to adjust beam alignment and establish optical communication links between die stacks.

Claims (34)

1. A die stack system comprising:

a system board;

a first die stack module affixed to the system board, the first die stack module comprising a first plurality of stacked die, each comprising a first deflectable optical beam waveguide at a die edge and a first plurality of deflection electrodes positioned to align the first deflectable optical beam waveguide to provide a direct optical link to another die; and

a second die stack module affixed to the system board to be adjacent to the first die stack module, the second die stack module comprising a second plurality of stacked die, each comprising a second deflectable optical beam waveguide at a die edge and a second plurality of deflection electrodes positioned to align the second deflectable optical beam waveguide to provide an optical link to a die of another die stack module.

2. The system of claim 1 , where the first die stack module and the second die stack module each comprises optical circuitry in which a laser transmitter generates a laser beam which is modulated with signal information to generate optical signal information which transmitted on an optical beam waveguide to a deflectable MEMS optical beam waveguide at the die edge.

3. The system of claim 1 , where the first die stack module comprises a plurality of stacked processor die and where the second die stack module comprises a plurality of stacked memory die.

4. The system of claim 3 , where each processor die in the first die stack module is rotated by 90 degrees to be perpendicular to each memory die in the second die stack module.

5. The system of claim 3 , where each processor die in the first die stack module comprises, for each memory die in the second die stack module, a plurality of deflectable MEMS optical beam waveguides at the processor die edge which may be aligned with deflection electrodes at the processor die to establish point-to-point optical links with a corresponding plurality of deflectable MEMS optical beam waveguides at each memory die.

6. The system of claim 1 , where the first die stack module comprises a plurality of horizontally stacked processor die and where the second die stack module comprises a plurality of vertically stacked memory die.

7. The system of claim 1 , where each die in the first die stack module comprises an optical feed-through for communicating optical signal information through said die.

8. The system of claim 3 , further comprising one or more additional die stack modules affixed to the system board, each additional die stack module comprising a plurality of stacked memory die, each memory die comprising a deflectable MEMS optical beam waveguide at a die edge and a plurality of deflection electrodes positioned to align the deflectable MEMS optical beam waveguide to provide an optical link to an adjacent die.

9. The system of claim 3 , further comprising one or more additional die stack modules affixed to the system board, each additional die stack module comprising a plurality of stacked processor die, each processor die comprising a deflectable MEMS optical beam waveguide at a die edge and a plurality of deflection electrodes positioned to align the deflectable MEMS optical beam waveguide to provide an optical link to a die of another die stack module.

10. An apparatus comprising:

a first die fixed to a substrate with a lateral orientation, where the first die comprises a first optical waveguide beam located at a lateral die edge of the first die; and

a second die fixed to the substrate with a vertical orientation that rotated ninety degrees from the lateral orientation, where the second die comprises a second optical waveguide beam located at a lateral die edge of the second die;

where the first optical waveguide beam is located for providing a direct optical link to the second optical waveguide beam, and where the first optical waveguide beam is deflectable.

11. The apparatus of claim 10 , where a plurality of deflection electrodes are positioned around each of the first optical waveguide beam and the second optical waveguide beam.

12. The apparatus of claim 11 , further comprising a first bias driver that generates one or more bias voltages for application to the plurality of deflection electrodes positioned around the first optical waveguide beam to deflect the first optical waveguide beam.

13. The apparatus of claim 12 , further comprising a second bias driver that generates one or more bias voltages for application to the plurality of deflection electrodes positioned around the second optical waveguide beam so that the first optical waveguide beam is deflected into alignment with the second optical waveguide beam.

14. The apparatus of claim 10 , where the first die comprises a processor die, and where the second die comprises a memory die.

15. The apparatus of claim 10 , further comprising:

a third die affixed to the second die to form a first die stack module, where the third die comprises a third optical waveguide beam formed at a lateral die edge of the third die, and where the first die further comprises an additional optical waveguide beam located at the lateral die edge of the first die to provide a direct optical link to the third optical waveguide beam of the third die.

16. The apparatus of claim 15 , where the first die comprises a processor die, and where the first die stack module comprises a memory die stack module.

17. The apparatus of claim 10 , where the first die comprises a laser transmitter for generating a laser beam, and a modulator for modulating the laser beam with signal information to generate optical signal information which is transmitted through the first die to the first optical waveguide beam for direct transmission to the second optical waveguide beam at the second die.

18. A multiple die stack computer system, comprising:

a first die stack comprising a plurality of microprocessor die which each comprise a first plurality of optical feed-through beams connected to corresponding optical MEMS waveguide beams formed at a lateral die edge of each microprocessor die; and

a plurality of die stacks, each comprising a plurality of memory die which each comprise a second plurality of optical feed-through beams connected to corresponding optical MEMS waveguide beams formed at a lateral die edge of each memory die;

where the plurality of microprocessor die in the first die stack are oriented perpendicularly from the plurality of memory die in the plurality of die stacks so that each processor die can establish direct point-to-point optical links with each of the plurality of memory die in an adjacent die stack by separately deflecting one or more optical MEMS waveguide beams at the processor die into alignment with corresponding optical MEMS waveguide beams at each of the plurality of memory die.

19. The multiple die stack computer system of claim 18 , where the plurality of die stacks comprises:

a first memory die stack of a first plurality of memory die, each comprising a first plurality of optical feed-through beams connected to corresponding optical MEMS waveguide beams formed at a lateral die edge of each memory die, where the first memory die stack is positioned adjacent to the first die stack to provide direct point-to-point optical links between the first die stack and the first memory die stack; and

a second memory die stack of a second plurality of memory die, each comprising optical MEMS waveguide beams formed at a lateral die edge of each memory die, where the second memory die stack is positioned adjacent to the first memory die stack to provide direct point-to-point optical links between first memory die stack and the second memory die stack and to communicate with the first die stack using the first plurality of optical feed-through beams connected to optical MEMS waveguide beams in the first memory die stack.

20. The multiple die stack computer system of claim 18 , further comprising:

a second die stack comprising a plurality of microprocessor die, each comprising a third plurality of optical feed-through beams connected to corresponding optical MEMS waveguide beams formed at a lateral die edge of each microprocessor die, where the second die stack is positioned adjacent to the first die stack to provide direct point-to-point optical links between the first die stack and the second die stack; and

a plurality of memory die stacks, each comprising a plurality of memory die having a fourth plurality of optical feed-through beams connected to corresponding optical MEMS waveguide beams formed at a lateral die edge of each memory die, where the plurality of microprocessor die in the second die stack are oriented perpendicularly from the plurality of memory die in the plurality of memory die stacks so that each processor die in the second die stack can establish direct point-to-point optical links with each of the plurality of memory die in an adjacent memory die stack.

Assignments (28)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 6, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Sep 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Sep 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Sep 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Sep 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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