Frequency-domain symbol and frame synchronization in multi-carrier systems
View Patent ↗Methods and systems are disclosed for frequency-domain symbol and frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency components associated with subcarriers within the multi-carrier communication signals. Symbol synchronization is performed in the frequency domain by performing correlation(s) between frequency components of the received signal and frequency-domain synchronization symbol(s). After symbol synchronization, frame synchronization correlation is also performed in the frequency domain between frequency components of the received signal and frequency-domain synchronization symbol(s). The disclosed embodiments are particularly useful for symbol and frame synchronization in multi-carrier received signals for power line communication (PLC) systems and/or other harsh noisy communication environments.
1. A method for symbol and frame synchronization for multi-carrier signals, comprising:
receiving input signals from a communication medium;
digitizing the input signals to generate digital samples;
generating frequency component sample values for the digital samples, the frequency component sample values being associated with symbols within the input signals;
performing a frequency-domain symbol synchronization correlation of the frequency component sample values with predetermined frequency components for one or more symbol reference symbols to determine a symbol boundary;
after a symbol boundary has been determined, performing a frequency-domain frame synchronization correlation of the frequency component sample values with frequency components for one or more predetermined frame reference symbols to determine a frame boundary; and
outputting synchronization output data associated with the performing steps;
wherein the performing a frequency-domain symbol synchronization correlation comprises:
determining a symbol synchronization correlation value based upon a multiplication of the frequency component sample values with the frequency components for the one or more symbol reference symbols;
providing additional symbol correlation values by shifting frequency component sample values by one sample and repeating the determining step for each shift; and
utilizing the symbol synchronization correlation values to determine a symbol boundary.
2. The method of claim 1 , wherein the generating step comprises applying a Fast Fourier Transform (FFT) to the digital samples to generate the frequency component sample values.
3. The method of claim 1 , further comprising normalizing the frequency component sample values by their amplitudes prior to the performing step.
4. The method of claim 1 , wherein the utilizing step comprises searching the symbol synchronization correlation values for a peak above a threshold value to determine a symbol boundary.
5. The method of claim 1 , further comprising storing the frequency component sample values within a buffer prior to the performing step.
6. The method of claim 1 , wherein the reference symbols comprise OFDM symbols, and wherein the reference symbols comprise symbols within a preamble for the G3-PLC standard for power line communication (PLC) systems.
7. The method of claim 1 , further comprising transmitting multi-carrier signals to the communication medium.
8. A method for symbol and frame synchronization for multi-carrier signals, comprising:
receiving input signals from a communication medium;
digitizing the input signals to generate digital samples;
generating frequency component sample values for the digital samples, the frequency component sample values being associated with symbols within the input signals;
performing a frequency-domain symbol synchronization correlation of the frequency component sample values with predetermined frequency components for one or more symbol reference symbols to determine a symbol boundary;
after a symbol boundary has been determined, performing a frequency-domain frame synchronization correlation of the frequency component sample values with frequency components for one or more predetermined frame reference symbols to determine a frame boundary; and
outputting synchronization output data associated with the performing steps;
wherein the performing a frequency-domain frame synchronization correlation comprises:
determining frame synchronization correlation value based upon a multiplication of the frequency component sample values with the frequency components for the one or more frame reference symbols;
providing additional frame correlation values by shifting frequency component sample values by one symbol and repeating the determining step for each shift; and
utilizing the plurality of frame synchronization correlation values to determine a frame boundary.
9. The method of claim 8 , wherein the utilizing step comprises searching the frame synchronization correlation values for a peak above a threshold value to determine the frame boundary.
10. The method of claim 8 , further comprising utilizing a counter to limit the repeating step and outputting an indication of no frame boundary detection if a limit is reached.
11. The method of claim 8 , wherein the generating step comprises applying a Fast Fourier Transform (FFT) to the digital samples to generate the frequency component sample values.
12. The method of claim 8 , further comprising normalizing the frequency component sample values by their amplitudes prior to the performing step.
13. The method of claim 8 , further comprising storing the frequency component sample values within a buffer prior to the performing step.
14. The method of claim 8 , wherein the reference symbols comprise OFDM symbols, and wherein the reference symbols comprise symbols within a preamble for the G3-PLC standard for power line communication (PLC) systems.
15. The method of claim 8 , further comprising transmitting multi-carrier signals to the communication medium.
16. A system for symbol and frame synchronization for multi-carrier signals, comprising:
analog-to-digital conversion circuitry configured to receive input signals from a communication medium and to output digital samples;
a Fast Fourier Transform (FFT) block configured to receive the digital samples and to generate frequency component sample values associated with symbols within the input signals;
a symbol synchronization correlation block configured to correlate the frequency component sample values with predetermined frequency components for one or more symbol reference symbols to determine a symbol boundary;
a frame synchronization correlation block configured to correlate the frequency component sample values with predetermined frequency components for one or more frame reference symbols to determine a frame boundary after a symbol boundary has been determined; and
a synchronization output block configured to output synchronization data associated with the symbol synchronization correlation block and the frame synchronization correlation block;
wherein the symbol synchronization correlation block comprises:
a multiplier block configured to generate symbol synchronization correlation values based upon multiplications of the frequency component sample values with the frequency components for the one or more symbol reference symbols, each symbol correlation value being based upon a different subset of frequency component sample values; and
a symbol synchronization output block configured to utilize the symbol synchronization correlation values to determine a symbol boundary.
17. The system of claim 16 , further comprising a digital signal processor (DSP) including the FFT block, the symbol synchronization correlation block, the frame synchronization correlation block, and the synchronization output block.
18. The system of claim 16 , further comprising an amplitude normalization block configured to normalize the frequency component sample values by their amplitude, and wherein the symbol synchronization correlation block and the frame synchronization correlation block are configured to utilize the amplitude normalized frequency component sample values.
19. The system of claim 16 , further comprising a peak detector configured to search the symbol synchronization correlation values for a peak above a threshold value to determine the symbol boundary.
20. The system of claim 16 , further comprising a buffer configured to store the frequency component sample values.
21. The system of claim 16 , wherein the communication medium comprises a power line communication medium, and wherein the reference symbols comprise symbols within a preamble for the G3-PLC standard for power line communication (PLC) systems.
22. A system for symbol and frame synchronization for multi-carrier signals, comprising:
analog-to-digital conversion circuitry configured to receive input signals from a communication medium and to output digital samples;
a Fast Fourier Transform (FFT) block configured to receive the digital samples and to generate frequency component sample values associated with symbols within the input signals;
a symbol synchronization correlation block configured to correlate the frequency component sample values with predetermined frequency components for one or more symbol reference symbols to determine a symbol boundary;
a frame synchronization correlation block configured to correlate the frequency component sample values with predetermined frequency components for one or more frame reference symbols to determine a frame boundary after a symbol boundary has been determined; and
a synchronization output block configured to output synchronization data associated with the symbol synchronization correlation block and the frame synchronization correlation block;
wherein the frame synchronization correlation block comprises:
a multiplier block configured to generate frame synchronization correlation values based upon multiplications of the frequency component sample values with the frequency components for the one or more frame reference symbols, each frame correlation value being based upon a different subset of frequency component sample values; and
a frame synchronization output block configured to utilize the symbol synchronization correlation values to determine a symbol boundary.
23. The system of claim 22 , further comprising a peak detector configured to search the frame synchronization correlation values for a peak above a threshold value to determine the frame boundary.
24. The system of claim 22 , further comprising a digital signal processor (DSP) including the FFT block, the symbol synchronization correlation block, the frame synchronization correlation block, and the synchronization output block.
25. The system of claim 22 , further comprising an amplitude normalization block configured to normalize the frequency component sample values by their amplitude, and wherein the symbol synchronization correlation block and the frame synchronization correlation block are configured to utilize the amplitude normalized frequency component sample values.
26. The system of claim 22 , further comprising a buffer configured to store the frequency component sample values.
27. The system of claim 22 , wherein the communication medium comprises a power line communication medium, and wherein the reference symbols comprise symbols within a preamble for the G3-PLC standard for power line communication (PLC) systems.