Multichip module with stiffening frame and associated covers
A multichip module includes a carrier, a stiffening frame, a plurality of semiconductor chips, and a plurality of covers. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes a plurality of openings that accept the plurality of semiconductor chips and may be attached to the top surface of the carrier with an adhesive that absorbs dimensional changes between the stiffening frame and the carrier. The semiconductor chips are concentrically arranged within the plurality of openings of the stiffening frame and the plurality of covers are attached to the stiffening frame so as to enclose the plurality of openings.
1. A method comprising:
attaching a stiffening frame to a carrier with a compliant adhesive that absorbs thermally induced dimensional variations between the stiffening frame and the carrier, the stiffening frame comprising a plurality of openings configured to accept a plurality of semiconductor chips;
electronically coupling the plurality of semiconductor chips to the carrier, each semiconductor chip being concentrically arranged within a particular opening, and;
attaching a plurality of covers to the stiffening frame to enclose the plurality of openings.
2. The method of claim 1 wherein at least a first cover is in thermal contact with a first semiconductor chip.
3. The method of claim 1 further comprising:
attaching a thermal interface material barrier to the stiffening frame perimeter.
4. The method of claim 1 wherein each cover comprises a top surface and wherein the top surface of a first cover is coplanar with the top surface of a second cover.
5. The method of claim 1 wherein each cover comprises a top surface and wherein the top surface of a first cover is non-planar with the top surface of a second cover.
6. The method of claim 1 wherein each cover comprises a top surface, wherein the stiffening frame comprises a top surface, and wherein the top surface of a first cover is coplanar with the top surface of the stiffening frame.
7. The method of claim 1 wherein the plurality of semiconductor chips are arranged in a homogenous chipset.
8. The method of claim 1 wherein the plurality of semiconductor chips are arranged in a heterogeneous chipset.
9. A method comprising:
electrically connecting a multichip module to a motherboard, the multichip module comprising:
a carrier comprising:
a top surface and a bottom surface configured to be electrically connected to a motherboard;
a stiffening frame attached to the top surface with an compliant adhesive that absorbs thermally induced dimensional variations between the stiffening frame and the carrier, the stiffening frame comprising:
a plurality of openings that accept the plurality of semiconductor chips;
a plurality of semiconductor chips electrically connected to the top surface and concentrically arranged within the plurality of openings, and;
a plurality of covers attached to the stiffening frame that enclose the plurality of openings;
thermally attaching a heat sink to the multichip module with a thermal interface material juxtaposed there between, the thermal interface material being dimensionally compliant to absorb dimensional differences between the plurality of covers and the heat sink.
10. The method of claim 9 wherein each cover comprises a top surface and wherein the top surface of a first cover is non-planar with the top surface of a second cover.
11. The method of claim 9 wherein at least a first cover is in thermal contact with a first semiconductor chip.
12. The method of claim 9 wherein the stiffening frame further comprises a thermal interface material barrier upon a top surface of the stiffening frame perimeter and wherein the thermal interface material is applied in the area within the thermal interface material barrier.