Multi-layer process-induced damage tracking and remediation
View Patent ↗A mechanism for determining cumulative process-induced damage due to the antenna effect during formation of an integrated circuit is provided. This cumulative process-induced damage is compared to a cumulative process-induced damage threshold for each layer to determine whether a violation has occurred, or whether cumulative damage below a threshold is such that a more aggressive use of conductive material in a subsequently formed layer can be made. The cumulative damage can also be compared to a cumulative process-induced damage warning threshold at each layer in order to warn a designer that steps should be taken during design/formation of subsequent conductive layers to reduce the cumulative damage. In addition, automated solutions are provided for exceeding either threshold, such as connecting conductive layers at a later stage in processing to avoid charge buildup on the gate dielectric or inclusion of diode devices to leak charge from the interconnect layers.
1. A method for routing an interconnect coupled to a gate electrode of a semiconductor device, the method comprising:
determining a cumulative damage threshold of a presently-evaluated conductive layer of the interconnect, wherein
the cumulative damage threshold comprises a limit of process-induced damage to a gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect;
determining cumulative damage to the gate dielectric of the gate electrode at the presently-evaluated conductive layer of the interconnect, wherein
the cumulative damage comprises process-induced damage to the gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect; and
redesigning one or more conductive layers of the interconnect if the cumulative damage to the gate dielectric is greater than the cumulative damage threshold for the presently-evaluated conductive layer.
2. The method of claim 1 further comprising:
determining a cumulative damage warning threshold of the presently-evaluated conductive layer of the interconnect, wherein the cumulative damage warning threshold is lower than the cumulative damage threshold.
3. The method of claim 2 wherein said determining the cumulative damage warning threshold comprises:
providing an antenna-ratio rule for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect;
generating a limit of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer, using the corresponding antenna-ratio rule for each conductive layer; and
summing a corresponding percentage of the limit of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer to determine the cumulative damage warning threshold of the presently-evaluated conductive layer.
4. The method of claim 3 wherein said summing further comprises:
applying a corresponding weighting factor to the limits of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer, wherein the weighting factor corresponds to physical effects associated with each layer.
5. The method of claim 2 further comprising:
displaying a warning, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold.
6. The method of claim 2 further comprising:
automatically determining a location for a diode coupled to the interconnect, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold.
7. The method of claim 6 wherein the diode provides a path to leak current from the interconnect during formation of the interconnect.
8. The method of claim 2 wherein said redesigning the one or more conductive layers of the interconnect comprises:
automatically determining a location for a metal bridge that couples layers of the interconnect to the gate electrode, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold, wherein
the metal bridge replaces one or more conductive layer segments or conductive vias coupling the presently-evaluated conductive layer of the interconnect to a previously-routed conductive layer of the interconnect,
the metal bridge comprises
one or more conductive layer regions formed from the presently-evaluated conductive layer to a selected subsequently formed conductive layer region, the one or more conductive layers electrically coupled to the presently-evaluated conductive layer and each other, and
one or more conductive layer regions formed from the gate electrode to the selected subsequently formed conductive layer region, the one or more conductive layers electrically coupled to the gate electrode.
9. The method of claim 2 further comprising:
performing said determining the cumulative damage threshold and said determining the cumulative damage to the gate dielectric of the gate electrode for a next conductive layer of the interconnect, if the cumulative damage to the gate dielectric of the gate electrode is less than the cumulative damage warning threshold for the presently-evaluated conductive layer of the interconnect.
10. The method of claim 1 further comprising:
performing said determining the cumulative damage threshold and said determining the cumulative damage to the gate dielectric of the gate electrode, for a next conductive layer of the interconnect, if the cumulative damage to the gate dielectric is less than the cumulative damage threshold for the presently-evaluated conductive layer.
11. The method of claim 1 wherein said determining the cumulative damage threshold comprises:
providing an antenna-ratio rule for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect;
generating the limit of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer, using the corresponding antenna-ratio rule for each conductive layer.
12. An integrated circuit design system comprising:
a placement module configured to locate functional structures of an integrated circuit design in appropriate locations of a floor plan of the integrated circuit;
a routing module configured to assign routes for conductive layers of an interconnect between functional structures of the integrated circuit, wherein the routing module is configured to
determine a cumulative damage threshold of a presently-evaluated conductive layer of the interconnect, wherein
the cumulative damage threshold comprises a limit of process-induced damage to a gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect,
determine cumulative damage to the gate dielectric of the gate electrode at the presently-evaluated conductive layer of the interconnect, wherein
the cumulative damage comprises process-induced damage to the gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect, and
redesign one or more conductive layers of the interconnect if the cumulative damage to the gate dielectric is greater than the cumulative damage threshold for the presently-evaluated conductive layer; and
a tape out module configured to provide information for generation of a photomask usable by a fabrication facility to manufacture the designed integrated circuit, wherein the information comprises information generated by the placement module and the routing module.
13. The integrated circuit design system of claim 12 wherein the routing module is further configured to:
determine a cumulative damage warning threshold of the presently-evaluated conductive layer of the interconnect, wherein the cumulative damage warning threshold is lower than the cumulative damage threshold.
14. The integrated circuit design system of claim 13 wherein the routing module determines the cumulative damage warning threshold by being further configured to:
receive an antenna-ratio rule for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect;
generate a limit of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer, using the corresponding antenna-ratio rule for each conductive layer; and
sum a corresponding percentage of the limit of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer to determine the cumulative damage warning threshold of the presently-evaluated conductive layer.
15. The method of claim 14 wherein the routing module is configured to perform said summing by being further configured to:
apply a corresponding weighting factor to the limits of process-induced damage for each of the presently-evaluated conductive layer and each previously routed conductive layer, wherein the weighting factor corresponds to physical effects associated with each layer.
16. The integrated circuit design system of claim 13 wherein the routing module is further configured to:
display a warning, on a display coupled to the routing module, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold.
17. The integrated circuit design system of claim 13 wherein the routing module is further configured to:
automatically determine a location for a diode coupled to the interconnect, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold.
18. The integrated circuit design system of claim 13 wherein the routing module is further configured to:
automatically determine a location for a metal bridge that couples layers of the interconnect to the gate electrode, if the cumulative damage to the gate dielectric of the gate electrode is greater than the cumulative damage warning threshold and less than the cumulative damage threshold, wherein
the metal bridge replaces one or more conductive vias coupling the presently-evaluated conductive layer of the interconnect to a previously-routed conductive layer of the interconnect,
the metal bridge comprises
one or more conductive layer regions formed from the presently-evaluated conductive layer to a selected subsequently formed conductive layer region, the one or more conductive layers electrically coupled to the presently-evaluated conductive layer and each other, and
one or more conductive layer regions formed from the gate electrode to the selected subsequently formed conductive layer region, the one or more conductive layers electrically coupled to the gate electrode.
19. The integrated circuit design system of claim 13 wherein the routing module is further configured to:
perform said determining the cumulative damage threshold and said determining the cumulative damage to the gate dielectric of the gate electrode for a next conductive layer of the interconnect, if the cumulative damage to the gate dielectric of the gate electrode is less than the cumulative damage warning threshold for the presently-evaluated conductive layer of the interconnect.
20. The integrated circuit design system of claim 12 wherein the routing module is further configured to:
perform said determining the cumulative damage threshold and said determining the cumulative damage to the gate dielectric of the gate electrode for a next conductive layer of the interconnect, if the cumulative damage to the gate dielectric is less than the cumulative damage threshold for the presently-evaluated conductive layer.