Granted Patent B2

US 8,941,117 · App. 13/935,345 · Granted Jan 27, 2015

Abstract

Claims (13)

1. An integrated device including a vertical III-nitride FET and a Schottky diode, the integrated device comprising:

a drain/cathode region comprising a first III-nitride material;

a drift region comprising a second III-nitride material coupled to the drain/cathode region;

a channel region comprising a third III-nitride material coupled to the drain/cathode region and disposed adjacent to the drain/cathode region along a vertical direction;

a gate region at least partially surrounding the channel region and having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface;

a source coupled to the channel region; and

an anode coupled to the drift region;

wherein the channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.

2. The integrated device of claim 1 wherein the channel region extends along at least a portion of the second surface of the gate region.

3. The integrated device of claim 1 wherein the first III-nitride material comprises an n-type substrate.

4. The integrated device of claim 1 wherein the second III-nitride material comprises an n-type GaN epitaxial layer having a dopant concentration less than or equal to a dopant concentration of the first III-nitride material and a thickness greater than 1 μm.

5. The integrated device of claim 1 wherein a width of the channel region measured along a direction orthogonal to a thickness of the drift region is less than 5 μm.

6. The integrated device of claim 1 wherein the gate region comprises a p-type III-nitride material.

Assignments (11)