IP Library Granted Patent US 9,431,475
Granted Patent B2
US 9,431,475 · App. 13/954,455 · Granted Aug 30, 2016

High density three-dimensional integrated capacitors

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Quick Facts
Patent No.
US 9,431,475
App. No.
13/954,455
Granted
Aug 30, 2016
Kind
B2
Abstract

A component includes a substrate and a capacitor formed in contact with the substrate. The substrate can consist essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C. The substrate can have a surface and an opening extending downwardly therefrom. The capacitor can include at least first and second pairs of electrically conductive plates and first and second electrodes. The first and second pairs of plates can be connectable with respective first and second electric potentials. The first and second pairs of plates can extend along an inner surface of the opening, each of the plates being separated from at least one adjacent plate by a dielectric layer. The first and second electrodes can be exposed at the surface of the substrate and can be coupled to the respective first and second pairs of plates.

Claims (26)

1. A component having electrodes for electrical interconnection with a circuit component or microelectronic element, comprising:

a substrate consisting essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C., the substrate having a first surface, a second surface opposite the first surface, and an opening extending between the first and second surfaces through a thickness of the substrate; and

a first capacitor formed in contact with the substrate, including:

a first pair of electrically conductive plates being first and second plates and a second pair of electrically conductive plates being third and fourth plates, each plate extending along an inner surface of the opening, wherein the first plate overlies the inner surface, the third plate overlies the first plate and is separated therefrom by a first capacitor dielectric layer, the second plate overlies the third plate and is separated therefrom by a second dielectric layer, and the fourth plate overlies the second plate and is separated therefrom by a third capacitor dielectric layer; and

first and second electrodes, the first electrode exposed at the first surface at a first location and electrically connected to the first pair of plates, the second electrode exposed at one of the first and second surfaces and electrically connected to the second pair of plates.

2. The component as claimed in claim 1 , wherein the first and second pairs of plates of the first capacitor and first and second pairs of plates of a second capacitor extend between the first and second surfaces through the opening, the first and second capacitors being insulated from one another within the opening.

3. A component as claimed in claim 1 , wherein the substrate consists essentially of one material selected from the group consisting of: semiconductor, glass, and ceramic.

4. A component as claimed in claim 1 , wherein the capacitor has a capacitance of at least 1 picoFarad.

5. The component as claimed in claim 1 , wherein the first and second pairs of plates extend between the first and second surfaces through the opening.

6. The component as claimed in claim 5 , wherein the first capacitor further includes third and fourth electrodes exposed at the second surface and respectively electrically connected to the first and second pairs of plates, the second electrode being exposed at the first surface.

7. A system comprising a component according to claim 1 and one or more other electronic components electrically connected to the component.

8. The system as claimed in claim 7 , further comprising a housing, said component and said other electronic components being mounted to said housing.

9. The component as claimed in claim 1 , wherein the first and second pairs of plates of each capacitor do not extend above the first surface or below the second surface, the second electrode being exposed at the second surface.

10. The component as claimed in claim 9 , wherein the first plate consists essentially of a first metal and the second plate consists essentially of a second metal different from the first metal.

11. A component as claimed in claim 10 , wherein the opening has a depth in a direction perpendicular to the first surface of at least 10 microns.

12. A component having electrodes for electrical interconnection with a circuit component or microelectronic element, comprising:

a substrate consisting essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C., the substrate having a first surface, a second surface opposite the first surface, and an opening in the first surface having at least one dimension greater than 5 microns in a direction along the first surface, the opening extending between the first and second surfaces through a thickness of the substrate; and

a capacitor, including:

first and second electrically conductive plates connectable with respective first and second electric potentials, the first and second electrically conductive plates extending along an inner surface of the opening, the first and second electrically conductive plates being separated from one another by a dielectric layer, wherein the first and second electrically conductive plates extend between the first and second surfaces through the opening;

first and second electrodes, the first electrode exposed at the first surface and electrically connected to the first electrically conductive plate, the second electrode exposed at the first surface and electrically connected to the second electrically conductive plate; and

third and fourth electrodes exposed at the second surface and respectively electrically connected to the first and second plates.

13. The component as claimed in claim 12 , wherein the first electrically conductive plate consists essentially of a first metal and the second electrically conductive plate consists essentially of a second metal different from the first metal.

14. A component as claimed in claim 12 , wherein the dielectric layer separating the first and second electrically conductive plates from one another has a dielectric constant k of at least 3.

15. A component as claimed in claim 12 , wherein a portion of the opening that is not occupied by the first and second electrically conductive plates and the dielectric layer is filled with a dielectric material.

16. A system comprising a component according to claim 12 and one or more other electronic components electrically connected to the component.

17. The system as claimed in claim 16 , further comprising a housing, said component and said other electronic components being mounted to said housing.

Assignments (7)
CHANGE OF NAME Recorded Sep 13, 2023
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 064897/0184 →
CERTIFICATE OF CONVERSION & CHANGE OF NAME Recorded Jun 27, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 060443/0792 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2013
From: TESSERA RESEARCH LLC
To: TESSERA, INC.
Reel/Frame 031169/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2013
From: OGANESIAN, VAGE; HABA, BELGACEM; MOHAMMED, ILYAS; SAVALIA, PIYUSH
To: TESSERA RESEARCH LLC
Reel/Frame 031096/0654 →