Wafer level package and fabrication method
View Patent ↗A method of forming an electronic component package includes coupling a first surface of an electronic component to a first surface of a first dielectric strip, the electronic component comprising bond pads on the first surface; forming first via apertures through the first dielectric strip to expose the bond pads; and filling the first via apertures with an electrically conductive material to form first vias electrically coupled to the bond pads. The bond pads are directly connected to the corresponding first vias without the use of a solder and without the need to form a solder wetting layer on the bond pads.
1. An electronic component package comprising:
an electronic component comprising a first surface comprising a bond pad;
a dielectric strip comprising a first surface coupled to the first surface of the electronic component;
a via extending through the dielectric strip and being coupled to the bond pad;
a trace coupled to a second surface of the dielectric strip and coupled to the via; and
an encapsulant encapsulating and directly contacting a second surface and sides of the electronic component.
2. The electronic component package of claim 1 wherein the bond pad is directly connected to the via.
3. The electronic component package of claim 1 wherein the trace extends outwards in a fan-out configuration.
4. The electronic component package of claim 1 wherein the trace extends outwards from a center of the electronic component.
5. The electronic component package of claim 1 wherein the trace comprises a first end electrically connected to the via.
6. The electronic component package of claim 5 wherein the trace extends outwards from the first end to a second end of the trace.
7. The electronic component package of claim 1 wherein the via extends from the bond pad in a first direction perpendicular to the first surface of the electronic component.
8. The electronic component package of claim 7 wherein the trace extends in a second direction perpendicular to the first direction and parallel to the first surface of the electronic component.
9. The electronic component package of claim 1 further comprising a laser-ablated via aperture, the via comprising electrically conductive material in the laser-ablated via aperture.
10. The electronic component package of claim 9 wherein the via is formed by plating the electrically conductive material in the laser-ablated via aperture.
11. The electronic component package of claim 10 wherein the trace is formed by plating the electrically conductive material on the second surface of the dielectric strip.
12. The electronic component package of claim 1 wherein the encapsulant providing provides rigidity and support for the electronic component package.
13. An electronic component package comprising:
an electronic component comprising a first surface comprising a bond pad;
a first dielectric strip comprising a first surface coupled to the first surface of the electronic component;
a via extending through the first dielectric strip and being coupled to the bond pad;
a trace on a second surface of the first dielectric strip and coupled to the via;
a second dielectric strip coupled to the first dielectric strip; and
an encapsulant encapsulating and directly contacting a second surface and sides of the electronic component.
14. The electronic component package of claim 13 wherein the trace is formed within the second dielectric strip.
15. The electronic component package of claim 13 wherein a first surface of the second dielectric strip is coupled to the second surface of the first dielectric strip.
16. The electronic component package of claim 13 wherein the trace is embedded within the second dielectric strip.
17. The electronic component package of claim 13 wherein an end of the trace is exposed from the second dielectric strip.
18. A method of forming an electronic component package comprising:
forming an assembly, the assembly comprising:
an electronic component comprising a first surface comprising bond pads thereon;
an encapsulant encapsulating the entire electronic component except the first surface of the electronic component; and
a first dielectric strip comprising a first surface coupled to the first surface of the electronic component including the bond pads;
forming vias extending through the first dielectric strip and being coupled to the bond pads; and
forming traces on a second surface of the first dielectric strip and coupled to the vias.
19. The method of claim 18 further comprising:
coupling a first surface of a second dielectric strip to the second surface of the first dielectric strip.
20. The method of claim 19 where the coupling a first surface of a second dielectric strip is performed prior to the forming traces.