IP Library Granted Patent US 9,252,185
Granted Patent B2
US 9,252,185 · App. 14/024,316 · Granted Feb 2, 2016

Back side illuminated image sensors with back side charge storage

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Quick Facts
Patent No.
US 9,252,185
App. No.
14/024,316
Granted
Feb 2, 2016
Kind
B2
Abstract

A back side illuminated image sensor may be provided with an array of image sensor pixels. Each image sensor pixel may include a substrate having a front surface and a back surface. The image sensor pixels may have a charge storage region formed at the back surface and a charge readout node formed at the front surface of the substrate. The image sensor pixels may receive image light at the back surface of the substrate. Photo-generated charge may be accumulated at the charge storage region during a charge integration cycle. Upon completion of the charge integration cycle, a transfer gate formed at the front surface may be pulsed high to move the charge from the charge storage region to the charge readout node. The charge may be converted to a voltage at the charge readout node and may be read out using a rolling shutter readout mode.

Claims (40)

1. An image sensor pixel comprising:

a substrate having opposing front and back surfaces, wherein the substrate comprises a p-type doped substrate;

a charge storage region formed at the back surface of the substrate, wherein the charge storage region is configured to accumulate photo-generated charge, and wherein the charge storage region comprises an n-type doping layer; and

a charge readout node formed at the front surface of the substrate, wherein the charge readout node is configured to receive the accumulated photo-generated charge from the charge storage region, wherein the charge readout node comprises an n-type doped floating diffusion region, and wherein only p-type doped silicon is interposed between the charge storage region and the charge readout node.

2. The image sensor pixel defined in claim 1 , further comprising:

a transfer gate formed at the front surface of the substrate, wherein the transfer gate is configured to transfer the accumulated photo-generated charge from the charge storage region to the charge readout node.

3. The image sensor pixel defined in claim 2 , wherein the photo-generated charge accumulated at the charge storage region comprises electrons.

4. The image sensor pixel defined in claim 2 , wherein the photo-generated charge accumulated at the charge storage region comprises holes.

5. The image sensor pixel defined in claim 2 , further comprising:

a blooming drain region formed at the front surface of the substrate; and

a blooming control gate formed at the front surface of the substrate, wherein the blooming control gate is configured to transfer overflow charge from the charge storage region to the blooming drain region.

6. The image sensor pixel defined in claim 5 , wherein the image sensor pixel is coupled to additional image sensor pixels and wherein the blooming control gate is shared between the image sensor pixel and the additional image sensor pixels.

7. The image sensor pixel defined in claim 1 , wherein the n-type doped floating diffusion region is formed at the front surface of the substrate.

8. The image sensor defined in claim 7 , further comprising:

analog-to-digital converter circuitry formed at the front surface of the substrate and coupled to the floating diffusion node, wherein the analog-to-digital converter circuitry is configured to convert an analog image signal received from the floating diffusion node into a digital image signal.

9. The image sensor pixel defined in claim 7 , further comprising:

a source follower transistor formed at the front surface of the substrate;

an addressing transistor formed at the front surface of the substrate; and

a reset transistor formed at the front surface of the substrate.

10. The image sensor pixel defined in claim 9 , wherein the source follower transistor has a source and a drain and wherein the addressing transistor is connected in series with the drain of the source follower transistor.

11. The image sensor pixel defined in claim 9 , wherein the source follower transistor has a source and a drain and wherein the addressing transistor is connected in series with the source of the source follower transistor.

12. The image sensor pixel defined in claim 1 , further comprising:

a color filter, wherein the color filter is formed over the back surface of the substrate.

13. The image sensor pixel defined in claim 12 , further comprising:

a microlens, wherein the microlens is formed over the back surface of the substrate.

14. A system, comprising:

a central processing unit;

memory;

input-output circuitry; and

an imaging device, wherein the imaging device comprises a pixel array having at least one pixel circuit, the at least one pixel circuit comprising:

a substrate having opposing front and back surfaces;

a charge storage region formed at the back surface of the substrate, wherein the charge storage region is configured to accumulate photo-generated charge;

a charge readout node formed at the front surface of the substrate, wherein the charge readout node is configured to receive the accumulated photo-generated charge photo from the charge storage region and wherein the charge readout node is configured to convert the accumulated photo-generated charge to a voltage;

a charge transfer gate formed at the front surface of the substrate adjacent to the charge readout node, wherein the charge transfer gate is configured to transfer the accumulated photo-generated charge from the charge storage region to the charge readout node;

a blooming drain region formed at the front surface of the substrate; and

a blooming control gate formed at the front surface of the substrate adjacent to the charge transfer gate, wherein the blooming control gate is configured to transfer overflow charge from the charge storage region to the blooming drain region while photo-generated charge is being accumulated at the charge storage region, and wherein the charge readout node comprises a floating diffusion node and wherein the charge transfer gate is configured to transfer the accumulated photo-generated charge from the charge storage region to the floating diffusion node while the blooming control gate is biased low.

15. An image sensor pixel comprising:

a substrate having opposing front and back surfaces, wherein the substrate comprises an n-type doped substrate;

a charge storage region formed at the back surface of the substrate, wherein the charge storage region is configured to accumulate photo-generated charge, and wherein the charge storage region comprises a p-type doping layer; and

a charge readout node formed at the front surface of the substrate, wherein the charge readout node is configured to receive the accumulated photo-generated charge from the charge storage region, wherein the charge readout node comprises a p-type doped floating diffusion region, and wherein only n-type doped silicon is interposed between the charge storage region and the charge readout node.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2024
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC D/B/A ONSEMI
To: LIBRE HOLDINGS, INC.
Reel/Frame 067396/0296 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: HYNECEK, JAROSLAV
To: APTINA IMAGING CORPORATION
Reel/Frame 031186/0859 →