IP Library Granted Patent US 46,549
Granted Patent E1
US 46,549 · App. 14/025,203 · Granted Sep 12, 2017

Integrated circuit chip having anti-moisture-absorption film at edge thereof and method of forming anti-moisture-absorption film

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Quick Facts
Patent No.
US 46,549
App. No.
14/025,203
Granted
Sep 12, 2017
Kind
E1
Abstract

An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.

Claims (16)

1. An integrated circuit device, comprising:

an integrated circuit chip;

a plurality of devices formed in the integrated circuit chip;

a scribe line formed at and defining the perimeter of the integrated circuit chip, said scribe line being used in separating the integrated circuit chip from other integrated circuit chips;

a passivation film formed on the integrated circuit chip;

a trench at a predetermined depth along the perimeter of the integrated circuit chip adjacent to the edge of the integrated circuit chip, the trench being formed at the scribe line at the perimeter of the integrated circuit chip, the predetermined depth being such that a boundary between multiple layers interlayer dielectric films of the integrated circuit device intersects a sidewall of the trench; and

an etching stop film formed under at least one of said multiple interlayer dielectric films, such that the bottom of said trench corresponding to said predetermined depth is formed within said one of said multiple interlayer dielectric films; and

an anti-moisture-absorption film in the trench at a predetermined thickness, said anti-moisture-absorption film covering the boundary between the multiple layers interlayer dielectric films such that moisture is prevented from seeping into the edge of the integrated circuit chip.

2. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film is formed on the sidewall of the trench.

3. The integrated circuit device of claim 1 , wherein the trench is etched into at least one interlayer dielectric film of the integrated circuit chip.

4. The integrated circuit device of claim 1 9, wherein the anti-moisture-absorption film is formed by extending the passivation film at least to a sidewall of the trench.

5. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film comprises a conductive layer pattern which fills the trench to a predetermined thickness and a passivation film extended so as to cover the conductive layer pattern.

6. The integrated circuit device of claim 5 , wherein the conductive pattern is formed of the same material as an uppermost interconnection layer of the integrated circuit chip.

7. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film comprises a conductive layer pattern which is formed on the sidewall of the trench to a predetermined thickness and a passivation film extended so as to cover the conductive layer pattern.

8. The integrated circuit device of claim 1, wherein the anti-moisture absorption film comprises a conductive anti-moisture absorption film.

9. The integrated circuit device of claim 1, wherein the anti-moisture absorption film comprises an insulative anti-moisture absorption film.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 10, 2020
From: CPPIB CREDIT INVESTMENTS INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 054371/0157 →
RELEASE OF U.S. PATENT AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Oct 12, 2018
From: ROYAL BANK OF CANADA, AS LENDER
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 047645/0424 →
AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Sep 9, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS INC., AS LENDER; ROYAL BANK OF CANADA, AS LENDER
Reel/Frame 033706/0367 →
CHANGE OF ADDRESS Recorded Sep 3, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 033678/0096 →
CHANGE OF NAME Recorded Mar 17, 2014
From: MOSAID TECHNOLOGIES INCORPORATED
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 032457/0560 →