IP Library Granted Patent US 9,252,272
Granted Patent B2
US 9,252,272 · App. 14/083,164 · Granted Feb 2, 2016

FinFET semiconductor device having local buried oxide

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,252,272
App. No.
14/083,164
Granted
Feb 2, 2016
Kind
B2
Abstract

There is set forth herein in one embodiment a FinFET semiconductor device having a fin extending from a bulk silicon substrate, wherein there is formed wrapped around a portion of the fin a gate, and wherein proximate a channel area of the fin aligned to the gate there is formed a local buried oxide region aligned to the gate. In one embodiment, the local buried oxide region is formed below a channel area of the fin.

Claims (38)

1. A semiconductor device comprising:

a substrate having a fin contiguous with the substrate extending therefrom;

a local buried oxide region formed in the fin contiguous with the substrate;

a gate, wherein the local buried oxide region is aligned to the gate so that the local buried oxide region is restricted to a location under the gate;

a channel defined in the fin above the local buried oxide region, the channel being aligned to the gate and having a first end and a second end;

a source defined at the first end of the channel; and

a drain defined at the second end of the channel.

2. The semiconductor device of claim 1 , wherein one or more of the source or drain includes an extension.

3. The semiconductor device of claim 1 , wherein the source includes means for reducing a short channel effect.

4. The semiconductor device of claim 1 , wherein the local buried oxide region is at least partially formed in the fin.

5. The semiconductor device of claim 1 , wherein the local buried oxide region is entirely formed in the fin.

6. The semiconductor device of claim 1 , wherein the local buried oxide region is partially formed in the fin and partially formed in the substrate.

7. The semiconductor device of claim 1 , wherein an area of the substrate below an elevation of a base of the fin includes an area of the local buried oxide region.

8. The semiconductor device of claim 1 , wherein the semiconductor device is a silicon wafer having a plurality of fins extending upwardly from the substrate, wherein fins of the plurality of fins have formed therein local buried oxide regions.

9. The semiconductor device of claim 1 , wherein the channel is aligned to the gate.

10. The semiconductor device of claim 1 , wherein one or more of the source and drain comprises an epitaxial growth formation.

11. The semiconductor device of claim 1 , wherein each of the source and drain comprises an epitaxial growth formation.

12. The semiconductor device of claim 1 , wherein the source includes means for inducing stress in the channel.

13. The semiconductor device of claim 1 , wherein the fin extends contiguously from the substrate.

14. The semiconductor device of claim 1 , wherein the source includes an extension.

15. The semiconductor device of claim 1 , wherein the local buried oxide region is entirely formed in the fin.

16. The semiconductor device of claim 1 , wherein the local buried oxide region is partially formed in the fin and partially formed in the substrate.

17. The semiconductor device of claim 1 , wherein the fin extends contiguously from the substrate.

18. The semiconductor device of claim 1 , wherein the local buried oxide region is entirely formed in the fin.

19. A semiconductor device comprising:

a substrate having a fin contiguous with the substrate extending therefrom;

a local buried oxide region;

a gate, wherein the local buried oxide region is aligned to the gate;

a channel defined in the fin contiguous with the substrate above the local buried oxide region, the channel being aligned to the gate and having a first end and a second end;

a source defined at the first end of the channel; and

a drain defined at the second end of the channel, wherein the local buried oxide region is at least partially formed in the fin, and wherein the local buried oxide region is formed under the gate but not under the source or drain.

20. A semiconductor device comprising:

a substrate having a fin contiguous with the substrate extending from the substrate;

a local buried oxide region formed in the fin contiguous with the substrate;

a gate, wherein the local buried oxide region is aligned to the gate;

a channel defined in the fin above the local buried oxide region, the channel being aligned to the gate and having a first end and a second end;

a source defined at the first end of the channel; and

a drain defined at the second end of the channel, wherein the local buried oxide region is formed under the gate but not under the source or drain.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2022
From: ALSEPHINA INNOVATIONS INC.
To: WOLLOCHET SOLUTIONS LLC
Reel/Frame 060210/0144 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049669/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2013
From: LIU, YANXIANG; CHI, MIN-HWA
To: GLOBALFOUNDRIES INC.
Reel/Frame 031624/0073 →