IP Library Granted Patent US 9,224,932
Granted Patent B2
US 9,224,932 · App. 14/096,420 · Granted Dec 29, 2015

Wafer level photonic device die structure and method of making the same

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Quick Facts
Patent No.
US 9,224,932
App. No.
14/096,420
Granted
Dec 29, 2015
Kind
B2
Abstract

A structure includes a carrier substrate with a first side and a second side opposite the first side. The carrier substrate has a first contact pad and a second contact pad disposed over the first side and a third contact pad and a fourth contact pad disposed over the second side. The carrier substrate further includes a substrate and an insulation film disposed between the substrate and the first, second, third, and fourth contact pads. The structure further includes a first epi-structure and a second epi-structure disposed over the carrier substrate. The structure further includes a first metal element and a second metal element. Moreover, the structure further includes a first through-via and a second through-via. The first through-via and the second through-via extend through the first and second epi-structures respectively.

Claims (45)

1. A structure, comprising:

a carrier substrate that includes a first contact pad and a second contact pad disposed over a first side of the carrier substrate and a third contact pad and a fourth contact pad disposed over a second side of the carrier substrate opposite the first side;

a first epi-structure and a second epi-structure disposed over the carrier substrate, the first and second epi-structures eac including a first doped semiconductor layer, a second doped semiconductor layer having a different type of conductivity from the first doped semiconductor layer, and a light-emitting layer disposed between the first and second doped semiconductor layers respectively;

a first metal element disposed between, and electrically coupling together, the first contact pad and the second doped semiconductor layer of the first epi-structure;

a second metal element disposed between, and electrically coupling together, the second contact pad and the second doped semiconductor layer of the second epi-structure; and

a first through-via and a second through-via that extend through the first and second epi-structures,respectively, wherein the first through-via electrically couples together the first doped semiconductor layer in the first epi-structure and the third contact pad;

wherein the carrier substrate includes a substrate and an insulation film disposed between the substrate and the first, second, third and fourth contact pads.

2. The structure of claim 1 , wherein the second through-via electrically couples together the first doped semiconductor layer of the second epi-structure and the second doped semiconductor layer of the first epi-structure.

3. The structure of claim 2 , wherein the second through-via is electrically coupled to the second doped semiconductor layer of the first epi-structure through the first contact pad.

4. The structure of claim 1 , further comprising a plurality of metal lines disposed over the first doped semiconductor layers of the first and second epi-structures.

5. The structure of claim 1 , further comprising:

a first ohmic reflector disposed between the second doped layer of the first epi-structure and the first metal element; and

a second ohmic reflector disposed between the second doped layer of the second epi structure and the second metal element.

6. The structure of claim 1 , wherein the first doped conductive layers of the first and second epi-structures each have roughened surfaces respectively.

7. The structure of claim 1 , wherein the carrier substrate includes:

a fifth contact pad disposed over the first side of the carrier substrate;

a third through-via and a fourth through-via that extend through the substrate from the first side to the second side respectively;

the third through-via is electrically coupled to the third and fifth contact pads;

the fourth through-via is electrically coupled to the second and fourth contact pads; and

the first through-via is electrically coupled to the third contact pad through the fifth contact pad and the third through-via.

8. A structure, comprising:

a substrate having a first surface and a second surface opposite the first surface;

a first conductive element and a second conductive element located over a first surface of the substrate and a third conductive element and a fourth conductive element located over the second surface of the substrate;

a first epi-structure and a second epi-structure located over the substrate, each of the first and second epi-structures including a first doped semiconductor layer, a second doped semiconductor layer having a different type of conductivity from the first doped semiconductor layer, and a light-emitting layer located between the first and second doped semiconductor layers;

a first metal clement electrically coupled to both the first conductive element and the second doped semiconductor layer;

a second metal element electrically coupled to both the second conductive element and the second doped semiconductor layer;

a first through-via that vertically extends through the first epi-structure;

a second through-via that vertically extends through the second epi-structure;

metal lines located over the first doped semiconductor layers of the first and second epi-structures; and

an insulation film located between the substrate and the first, second, third, and fourth conductive elements.

9. The structure of claim 8 , further comprising:

a first ohmic reflector located between the second doped layer of the first epi-structure and the first metal clement; and

a second ohmic reflector located between the second doped layer of the second epi-structure and the second metal element.

10. The structure of claim 8 , wherein:

the first metal element is located between the first conductive element and one of the second doped semiconductor layer; and

the second metal element is located between the second conductive element and one of the second doped semiconductor layer.

11. The structure of claim 8 , wherein:

the first through-via electrically couples together one of the first doped semiconductor layers and the third conductive element; and

the second through-via electrically couples together one of the first doped semiconductor layers and one of the second doped semiconductor layers.

12. The structure of claim 8 , wherein the first doped conductive layers of the first and second epi-structures have roughened surfaces respectively.

13. The structure of claim 8 , further comprising a fifth conductive element located over the first surface.

14. The structure of claim 13 , further comprising a third through-via and a fourth through-via that extend through the substrate from the first surface to the second surface respectively.

15. The structure of claim 14 , wherein:

the third through-via is electrically coupled to the third and fifth conductive elements; the fourth through-via is electrically coupled to the second and fourth conductive elements; and

the first through-via is electrically coupled to the third conductive element through the fifth conductive element and the third through-via.

Assignments (5)
CHANGE OF NAME Recorded Apr 22, 2026
From: EPISTAR CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075513/0783 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: EPISTAR CORPORATION
To: TAU CETI VENTURES LLC
Reel/Frame 073969/0972 →
CHANGE OF NAME Recorded Dec 2, 2015
From: TSMC SOLID STATE LIGHTING LTD.
To: CHIP STAR LTD.
Reel/Frame 037195/0724 →
MERGER Recorded Dec 2, 2015
From: CHIP STAR LTD.
To: EPISTAR CORPORATION
Reel/Frame 037195/0738 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2013
From: YU, CHIH-KUANG; KUO, HUNG-YI
To: TSMC SOLID STATE LIGHTING LTD.
Reel/Frame 031714/0122 →