INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD OF MANUFACTURE THEREOF

1 . A method of manufacture of an integrated circuit packaging system comprising:

providing an integrated circuit die having a contact pad;

depositing a lower passivation layer on the integrated circuit die leaving the contact pad exposed;

patterning a pattern mask having mask openings on the lower passivation layer;

forming a redistribution layer on the contact pad and the lower passivation layer by depositing a conductive ink in the mask openings;

removing the pattern mask;

depositing an upper passivation layer over the redistribution layer leaving a portion of the redistribution layer exposed; and

attaching an external interconnect to the redistribution layer.

2 . The method as claimed in claim 1 further comprising depositing an adhesion layer on the redistribution layer.

3 . The method as claimed in claim 1 wherein forming the redistribution layer includes forming the redistribution layer having a chip contact, a trace, and a bump pad.

4 . The method as claimed in claim 1 further comprising providing an encapsulation on the integrated circuit die.

5 . The method as claimed in claim 1 wherein patterning the pattern mask includes using photolithography to pattern a photoresist.

6 . A method of manufacture of an integrated circuit packaging system comprising:

providing an integrated circuit die having a contact pad;

providing an encapsulation on the integrated circuit die leaving the contact pad exposed;

depositing a lower passivation layer on the integrated circuit die leaving the contact pad exposed;

patterning a pattern mask having mask openings on the lower passivation layer;

forming a redistribution layer on the contact pad and the lower passivation layer by depositing a conductive ink in the mask openings, the redistribution layer having a chip contact, a trace, and a bump pad;

depositing an adhesion layer on the redistribution layer;

removing the pattern mask;

depositing an upper passivation layer over the redistribution layer leaving the area above the bump pad of the redistribution layer exposed; and

attaching an external interconnect to the adhesion layer over the bump pad.

7 . The method as claimed in claim 6 wherein depositing the adhesion layer includes depositing the adhesion layer only on the bump pad of the redistribution layer.

8 . The method as claimed in claim 6 wherein depositing an adhesion layer includes depositing the adhesion layer across the entire surface of a redistribution layer.

9 . The method as claimed in claim 6 wherein depositing the adhesion layer includes depositing the adhesion layer only on the bump pad of the redistribution layer through the upper passivation layer.

10 . The method as claimed in claim 6 wherein depositing the conductive ink includes printing, jetting, or spraying the conductive ink.

11 . An integrated circuit packaging system comprising:

an integrated circuit die having a contact pad;

a redistribution layer on the contact pad, the redistribution layer having a chip contact, a trace, and a bump pad, the redistribution layer having a curved top surface and sidewalls which are planar;

an upper passivation layer on the sidewalls of the redistribution layer with the area above the bump pad of the redistribution layer exposed from the upper passivation layer; and

an external interconnect attached over the bump pad.

12 . The system as claimed in claim 11 further comprising an adhesion layer on the redistribution layer.

13 . The system as claimed in claim 11 further comprising an encapsulation on the integrated circuit die.

14 . The system as claimed in claim 11 further comprising a lower passivation layer between and on the integrated circuit die and the redistribution layer.

15 . The system as claimed in claim 11 wherein the upper passivation layer is over the redistribution layer.

16 . The system as claimed in claim 11 further comprising:

an encapsulation on the integrated circuit die;

a lower passivation layer between and on the integrated circuit die and the redistribution layer, the lower passivation layer on the encapsulation; and

an adhesion layer having a curved top surface on the redistribution layer.

17 . The system as claimed in claim 16 wherein the adhesion layer is only on the bump pad of the redistribution layer.

18 . The system as claimed in claim 16 wherein an adhesion layer covers the entire surface of a redistribution layer.

19 . The system as claimed in claim 16 wherein the external interconnect is directly on the curved top surface of the adhesion layer.

20 . The system as claimed in claim 16 wherein the redistribution layer is formed from conductive ink which has been cured.