IP Library Granted Patent US 9,256,380
Granted Patent B1
US 9,256,380 · App. 14/142,612 · Granted Feb 9, 2016

Apparatus and method for packet memory datapath processing in high bandwidth packet processing devices

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,256,380
App. No.
14/142,612
Granted
Feb 9, 2016
Kind
B1
Abstract

A method of processing packets includes receiving packets and assigning the packets to different pages, where each page represents a fixed amount of memory. The different pages are distributed to different pools, where each pool has a unique mapping to banks, and where each bank is a set of memory resources. The different pages from the different pools are assigned to different banks in accordance with the unique mapping.

Claims (24)

1. A packet processor, comprising:

a packet memory; and

a packet memory manager in communication with the packet memory to allocate resources in the packet memory in accordance with a mapped hierarchy between pages, wherein each page represents a fixed amount of memory, pools assigned to a subset of the pages, and banks assigned to a subset of the pools, wherein each bank represents a set of memory resources, wherein the packet memory manager assigns selected pages to a selected pool, which distributes the selected pages to the banks associated with the selected pool, such that the mapped hierarchy provides load distribution within the packet memory.

2. The packet processor of claim 1 wherein the packet memory manager is configured to process different page sizes, wherein each different page size is a multiple of a page size.

3. The packet processor of claim 2 wherein the packet memory manager is configured to create a unique assignment between pages and pools for each different page size.

4. The packet processor of claim 1 wherein the packet memory manager is configured to bundle a subset of pages assigned to a common pool and communicate the bundle as a single element.

5. The packet processor of claim 4 wherein the packet memory manager is configured to map pages to groups.

6. The packet processor of claim 1 wherein the packet memory manager is configured to observe disabled banks.

7. The packet processor of claim 6 wherein the packet memory manager is configured to alter assignments between pools and banks in response to disabled banks.

8. The packet processor of claim 6 wherein the packet memory manager is configured to reserve pages for swapping with pages assigned to disabled banks.

9. A method of processing packets, comprising:

receiving packets;

assigning the packets to different pages, wherein each page represents a fixed amount of memory;

distributing the different pages to different pools, wherein each pool has a unique mapping to banks, and wherein each bank is a set of memory resources; and

assigning the different pages from the different pools to different banks in accordance with the unique mapping.

10. The method of claim 9 further comprising operating in alternate modes with different page sizes, wherein each different page size is a multiple of a page size.

11. The method of claim 10 further comprising creating a unique assignment between pages and pools for each different page size, while maintaining the banks assigned to pools.

12. The method of claim 9 further comprising bundling a subset of pages assigned to a common pool and communicating the bundle as a single element.

13. The method of claim 12 further comprising reclaiming pages by composing several bundles simultaneously and freeing one newly composed bundle at a time.

14. The method of claim 9 further comprising load balancing page writes across all banks associated with a pool.

15. The method of claim 9 further comprising mapping pages to groups.

16. The method of claim 9 further comprising observing disabled banks.

17. The method of claim 16 further comprising altering assignments between pools and banks in response to disabled banks.

18. The method of claim 16 further comprising reserving pages for swapping with pages assigned to disabled banks.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CHANGE OF NAME Recorded Jan 11, 2019
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 049367/0717 →
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2018
From: JP MORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: CAVIUM, INC; CAVIUM NETWORKS LLC; QLOGIC CORPORATION
Reel/Frame 046496/0001 →
SECURITY AGREEMENT Recorded Aug 17, 2016
From: CAVIUM, INC.; CAVIUM NETWORKS LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 039715/0449 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2016
From: CAVIUM NETWORKS LLC
To: CAVIUM, INC.
Reel/Frame 039425/0520 →
MERGER Recorded Aug 12, 2016
From: XPLIANT, INC.
To: CAVIUM NETWORKS LLC
Reel/Frame 039425/0437 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2014
From: DANIEL, TSAHI; MUSOLL, ENRIC; TU, DAN
To: XPLIANT, INC.
Reel/Frame 032447/0396 →