IP Library Granted Patent US 9,349,666
Granted Patent B1
US 9,349,666 · App. 14/231,526 · Granted May 24, 2016

Integrated circuit packaging system with package stacking

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Quick Facts
Patent No.
US 9,349,666
App. No.
14/231,526
Granted
May 24, 2016
Kind
B1
Abstract

An integrated circuit packaging system includes: providing a base substrate; applying a molded under-fill on the base substrate; forming a substrate contact extender through the molded under-fill and in direct contact with the base substrate; mounting a stack device over the molded under-fill; attaching a coupling connector from the substrate contact extender to the stack device; and forming a base encapsulation on the stack device, the substrate contact extender, and encapsulating the coupling connector.

Claims (28)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a base substrate;

applying a molded under-fill on the base substrate;

mounting an intermediate substrate on the molded under-fill;

forming a substrate contact extender through the molded under-fill, the substrate contact extender completely through the intermediate substrate;

mounting a coupling connector on the substrate contact extender;

mounting an intermediate integrated circuit mounted directly on the intermediate substrate, the intermediate integrated circuit between the coupling connector and another of the coupling connector; and

mounting a stack device directly on the coupling connector, the stack device suspended above the intermediate integrated circuit by the coupling connector.

2. The method as claimed in claim 1 wherein:

mounting the intermediate integrated circuit includes mounting an intermediate wire-bonded chip on the intermediate substrate; and

further comprising:

forming an intermediate encapsulation on the intermediate substrate and encapsulating the intermediate wire-bonded chip.

3. The method as claimed in claim 1 wherein:

mounting the intermediate integrated circuit includes mounting an intermediate flip chip on the intermediate substrate.

4. An integrated circuit packaging system comprising:

a base substrate;

a molded under-fill on the base substrate;

an intermediate substrate mounted on the molded under-fill;

a substrate contact extender formed through the molded under-fill, the substrate contact extender formed completely through the intermediate substrate;

a coupling connector mounted on the substrate contact extender;

an intermediate integrated circuit mounted directly on the intermediate substrate, the intermediate integrated circuit between the coupling connector and another of the coupling connector; and

a stack device mounted directly on the coupling connector, the stack device suspended above the intermediate integrated circuit by the coupling connector.

5. The system as claimed in claim 4 wherein:

the intermediate integrated circuit includes an intermediate wire-bonded chip mounted on the intermediate substrate; and

further comprising:

an intermediate encapsulation on the intermediate substrate and encapsulating the intermediate wire-bonded chip.

6. The system as claimed in claim 4 wherein:

the intermediate integrated circuit includes an intermediate flip chip on the intermediate substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CHANGE OF NAME Recorded Jul 27, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039492/0956 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2016
From: BAE, JOHYUN; YOON, IN SANG; CHOI, DAESIK
To: STATS CHIPPAC LTD.
Reel/Frame 039262/0879 →