Method for making semiconductor diodes with low reverse bias currents

1. A method of forming a diode, comprising:

providing a III-N material structure having an electrically conductive channel therein;

forming two terminals, wherein a first terminal is an anode adjacent to the III-N material structure, and a second terminal is a cathode in ohmic contact with the electrically conductive channel; and

depositing a dielectric layer over at least a portion of the anode; wherein

the anode comprises a first metal layer comprising nickel adjacent to the III-N material structure, a second metal layer comprising gold, and an intermediary electrically conductive structure between the first metal layer and the second metal layer, the intermediary electrically conductive structure comprising a layer of gold adjacent to the first metal layer and a layer of nickel between the layer of gold and the second metal layer.

2. The method of claim 1 , wherein the III-N material structure comprises a first III-N material layer and a second III-N material layer, and wherein the electrically conductive channel is a 2DEG channel induced in a region of the first III-N material layer adjacent the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer.

3. The method of claim 2 , wherein the first III-N material layer includes GaN.

4. The method of claim 3 , wherein the second III-N material layer includes AlGaN or AlInGaN.

5. The method of claim 2 , further comprising forming a third III-N material layer between the first III-N material layer and the second III-N material layer.

6. The method of claim 5 , wherein the third III-N material layer comprises AlN.

7. The method of claim 2 , wherein the first III-N material layer and the second III-N material layer are group III-face or [0 0 0 1] oriented or group-III terminated semipolar layers, and the second III-N material layer is between the first III-N material layer and the dielectric layer.

8. The method of claim 2 , wherein the first III-N material layer and the second III-N material layer are N-face or [0 0 0 1bar] oriented or nitrogen-terminated semipolar layers, and the first III-N material layer is between the second III-N material layer and the dielectric layer.

9. The method of claim 1 , further comprising forming a field plate connected to the anode.

10. The method of claim 1 , wherein the dielectric layer comprises SiN x .

11. The method of claim 1 , wherein the dielectric layer is between about 0.2 microns and 20 microns thick.

12. The method of claim 1 , wherein the dielectric layer comprises a first dielectric layer and a second dielectric layer on a side of the first dielectric layer opposite the III-N material structure.

13. The method of claim 12 , wherein the second dielectric layer comprises SiO y N z .

14. The method of claim 1 , further comprising a dielectric passivation layer between the III-N material structure and the dielectric layer, the dielectric passivation layer contacting a surface of the III-N material structure between the anode and the cathode.

15. The method of claim 14 , wherein the dielectric passivation layer comprises SiN.

16. The method of claim 14 , further including forming an additional insulating layer between the dielectric layer and the dielectric passivation layer.

17. The method of claim 16 , wherein the additional insulating layer comprises AlN.

18. The method of claim 1 , wherein the intermediary electrically conductive structure consists of the layer of gold, the layer of nickel and a layer of titanium, wherein the layer of titanium is between the layer of nickel and the second metal layer.

19. The method of claim 1 , further comprising forming an electrode-defining layer between the III-N material structure and the dielectric layer, wherein the electrode-defining layer comprises an aperture with at least a portion of the anode in the aperture.

20. The method of claim 19 , wherein the electrode-defining layer comprises SiN x .

21. The method of claim 19 , wherein the anode includes a portion extending over a surface of the electrode-defining layer.

22. The method of claim 21 , wherein the aperture in the electrode-defining layer includes a step, and the extending portion of the anode is over the step.

23. The method of claim 21 , wherein the portion of the anode extending over the surface of the electrode-defining layer functions as a field plate.

24. The method of claim 1 , wherein the second metal layer is thicker than the first metal layer.

25. The method of claim 24 , wherein the layer of gold in the intermediary conductive structure is between about 3500 and 7500 Angstroms thick.

26. A method of forming a diode, comprising:

providing a III-N material structure having an electrically conductive channel therein;

forming a recess in the III-N material structure;

forming two terminals, wherein a first terminal is an anode adjacent to the III-N material structure, and a second terminal is a cathode in ohmic contact with the electrically conductive channel; and

depositing a dielectric layer over at least a portion of the anode; wherein

at least a portion of the anode is in the recess; and

the anode includes a first metal layer comprising nickel adjacent to the III-N material structure, a second metal layer comprising gold, and an intermediary electrically conductive structure between the first metal layer and the second metal layer, the intermediary electrically conductive structure comprising a layer of gold adjacent to the first metal layer and a layer of nickel between the layer of gold and the second metal layer.

27. The method of claim 26 , wherein the III-N material structure comprises a first III-N material layer and a second III-N material layer, the electrically conductive channel is a 2DEG channel induced in a region of the first III-N material layer adjacent the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer, and forming the recess causes the recess to extend through the 2DEG channel.

28. The method of claim 26 , wherein forming the recess causes the recess to extend at least 30 nanometers into the III-N material structure.

29. The method of claim 26 , further comprising forming an electrode-defining layer between the III-N material structure and the dielectric layer.

30. The method of claim 29 , wherein the electrode-defining layer comprises SiN.

31. The method of claim 29 , further comprising forming a dielectric passivation layer between the III-N material structure and the electrode-defining layer, the dielectric passivation layer contacting a surface of the III-N material structure between the anode and the cathode.

32. The method of claim 31 , wherein the dielectric passivation layer comprises SiN.

33. The method of claim 31 , further comprising forming an additional insulating layer between the dielectric passivation layer and the electrode-defining layer.

34. The method of claim 33 , wherein the additional insulating layer comprises AlN.

35. The method of claim 33 , wherein the additional insulating layer is less than about 20 nanometers thick.

36. The method of claim 29 , wherein the anode includes an extending portion which is over a surface of the electrode-defining layer.

37. The method of claim 36 , wherein the recess is in the electrode-defining layer and includes a step, and the extending portion of the anode is over the step.

38. The method of claim 36 , wherein the extending portion of the anode functions as a field plate.

39. The method of claim 26 , wherein the intermediary conductive structure further includes a layer of titanium.