IP Library Granted Patent US 9,769,936
Granted Patent B2
US 9,769,936 · App. 14/300,360 · Granted Sep 19, 2017

Production method of circuit board

Inventors: Kenji Iida (Nagano, JP); Takashi Nakagawa (Kawasaki, JP); Seigo Yamawaki (Nagano, JP); Yasuhiro Karahashi (Nagano, JP); Junichi Kanai (Nagano, JP); Koji Komemura (Nagano, JP)
Assignee: FUJITSU LIMITED
H05K3/4623H05K3/4069H05K3/007H05K3/0035H05K2201/096Y10T29/49165
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Quick Facts
Patent No.
US 9,769,936
App. No.
14/300,360
Granted
Sep 19, 2017
Kind
B2
Abstract

A method for producing circuit board, including: adhering plastic deformable insulating material onto surface of laminate, which contains second-metal-layer of second metal, and first-metal-layer in pattern on second-metal-layer, and the surface of the laminate is surface of second-metal-layer where first-metal-layer is formed, and surface of first-metal-layer, followed by curing the material, and removing second-metal-layer to form plate structure to which first-metal-layer in pattern is formed; opening hole in cured material from surface of the plate structure opposite to surface thereof where first-metal-layer is formed, until the hole reaches first-metal-layer; filling the hole with electroconductive paste, to form the plate structure filled therewith; and laminating one plate structure filled therewith with the other plate structure filled therewith in manner that first-metal-layer of one plate structure filled therewith faces opening of the hole of other plate structure filled therewith, wherein first-metal-layer contains metal different from second metal.

Claims (13)

1. A method for producing a circuit board, comprising:

adhering a plastic deformable insulating material onto a surface of a laminate, where the laminate contains a metal support, a second metal layer formed of a second metal, and a first metal layer in form of a pattern formed on the second metal layer in this order, and the surface of the laminate is a surface of the second metal layer at which the first metal layer has been formed, and onto a surface of the first metal layer, followed by forming a third metal layer on the insulating material, followed by completely curing the insulating material, followed by removing the metal support and the third metal layer, and followed by removing the second metal layer to form a plate structure to which the first metal layer in form of a pattern is formed;

opening a hole in the cured insulating material from a surface of the plate structure opposite to a surface thereof at which the first metal layer has been formed, until the hole reaches the first metal layer;

filling the hole with an electroconductive paste, to form the plate structure filled with the electroconductive paste; and

laminating one plate structure filled with the electroconductive paste with other plate structure filled with the electroconductive paste in a manner that the first metal layer of the one plate structure filled with the electroconductive paste faces an opening of the hole of the other plate structure filled with the electroconductive paste,

wherein the first metal layer contains a metal different from the second metal.

2. The method according to claim 1 , wherein the curing the insulating material is complete curing,

wherein the plate structure further contains an adhesive layer, and a release layer in this order on a surface of the plate structure opposite to a surface thereof at which the first metal layer has been formed, during the opening the hole in the cured insulating material, and

wherein the release layer is peeled off after the filling the hole with the electroconductive paste.

3. The method according to claim 1 , wherein the curing the insulating material is semi-curing,

wherein the plate structure further contains a release layer on a surface of the plate structure opposite to a surface thereof at which the first metal layer has been formed, during the opening the hole in the cured insulating material, and

wherein the release layer is peeled off after the filling the hole with the electroconductive paste.

4. The method according to claim 1 , wherein a surface of the third metal layer in contact with the insulating material has an arithmetic average roughness (Ra) of 1.0 μm or less.

Assignments (5)
CHANGE OF NAME Recorded Apr 23, 2026
From: FM HOLDINGS CO., LTD.
To: FICT LIMITED
Reel/Frame 075466/0044 →
MERGER AND CHANGE OF NAME Recorded Dec 22, 2025
From: FICT LIMITED; FM HOLDINGS CO., LTD.
To: FM HOLDINGS CO., LTD.
Reel/Frame 074019/0640 →
CHANGE OF NAME Recorded Jun 6, 2023
From: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
To: FICT LIMITED
Reel/Frame 063881/0638 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2020
From: FUJITSU LIMITED
To: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
Reel/Frame 052345/0603 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2014
From: IIDA, KENJI; NAKAGAWA, TAKASHI; YAMAWAKI, SEIGO; KARAHASHI, YASUHIRO; KANAI, JUNICHI; KOMEMURA, KOJI
To: FUJITSU LIMITED
Reel/Frame 033064/0043 →
Priority Claims (1)
JP 2013-154705 · Jul 25, 2013 · national
Continuity (1)
Related Publication 20150029679A1 · Jan 29, 2015